2017-10-10 00:13:16 +02:00
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/**
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* Marlin 3D Printer Firmware
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* Copyright (C) 2016, 2017 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#ifndef ULCDST7565_H
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#define ULCDST7565_H
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#include <U8glib.h>
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2018-05-12 11:22:55 +02:00
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#include "delay.h"
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2017-10-10 00:13:16 +02:00
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#define ST7565_CLK_PIN DOGLCD_SCK
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#define ST7565_DAT_PIN DOGLCD_MOSI
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#define ST7565_CS_PIN DOGLCD_CS
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#define ST7565_A0_PIN DOGLCD_A0
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#define LCD_PIXEL_WIDTH 128
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#define LCD_PIXEL_HEIGHT 64
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#define PAGE_HEIGHT 8
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//set optimization so ARDUINO optimizes this file
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#pragma GCC optimize (3)
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// If you want you can define your own set of delays in Configuration.h
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2018-05-12 11:22:55 +02:00
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//#define ST7565_DELAY_1 DELAY_NS(0)
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//#define ST7565_DELAY_2 DELAY_NS(0)
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//#define ST7565_DELAY_3 DELAY_NS(0)
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2017-10-10 00:13:16 +02:00
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/*
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#define ST7565_DELAY_1 u8g_10MicroDelay()
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#define ST7565_DELAY_2 u8g_10MicroDelay()
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#define ST7565_DELAY_3 u8g_10MicroDelay()
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*/
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#if F_CPU >= 20000000
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2018-05-12 11:22:55 +02:00
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#define CPU_ST7565_DELAY_1 DELAY_NS(0)
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#define CPU_ST7565_DELAY_2 DELAY_NS(0)
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#define CPU_ST7565_DELAY_3 DELAY_NS(63)
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2017-10-31 21:21:44 +01:00
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#elif MB(3DRAG) || MB(K8200) || MB(K8400)
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2018-05-12 11:22:55 +02:00
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#define CPU_ST7565_DELAY_1 DELAY_NS(0)
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#define CPU_ST7565_DELAY_2 DELAY_NS(188)
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#define CPU_ST7565_DELAY_3 DELAY_NS(0)
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2017-10-31 21:21:44 +01:00
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#elif MB(MINIRAMBO)
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2018-05-12 11:22:55 +02:00
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#define CPU_ST7565_DELAY_1 DELAY_NS(0)
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#define CPU_ST7565_DELAY_2 DELAY_NS(250)
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#define CPU_ST7565_DELAY_3 DELAY_NS(0)
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2017-10-31 21:21:44 +01:00
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#elif MB(RAMBO)
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2018-05-12 11:22:55 +02:00
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#define CPU_ST7565_DELAY_1 DELAY_NS(0)
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#define CPU_ST7565_DELAY_2 DELAY_NS(0)
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#define CPU_ST7565_DELAY_3 DELAY_NS(0)
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2017-10-10 00:13:16 +02:00
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#elif F_CPU == 16000000
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2018-05-12 11:22:55 +02:00
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#define CPU_ST7565_DELAY_1 DELAY_NS(0)
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#define CPU_ST7565_DELAY_2 DELAY_NS(0)
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#define CPU_ST7565_DELAY_3 DELAY_NS(63)
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2017-10-10 00:13:16 +02:00
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#else
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#error "No valid condition for delays in 'ultralcd_st7565_u8glib_VIKI.h'"
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#endif
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#ifndef ST7565_DELAY_1
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#define ST7565_DELAY_1 CPU_ST7565_DELAY_1
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#endif
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#ifndef ST7565_DELAY_2
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#define ST7565_DELAY_2 CPU_ST7565_DELAY_2
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#endif
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#ifndef ST7565_DELAY_3
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#define ST7565_DELAY_3 CPU_ST7565_DELAY_3
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#endif
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2018-02-16 09:28:42 +01:00
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// On Viki2 the LCD and the SD card share a single SPI
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#define HARDWARE_SPI ((DOGLCD_SCK == SCK_PIN) && (DOGLCD_MOSI == MOSI_PIN))
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2017-10-10 00:13:16 +02:00
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2018-02-16 09:28:42 +01:00
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#if HARDWARE_SPI // using the hardware SPI
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#define ST7565_WRITE_BYTE(a) { SPDR = a; while (!TEST(SPSR, SPIF)); U8G_DELAY(); }
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#define ST7560_WriteSequence(count, pointer) { uint8_t *ptr = pointer; for (uint8_t i = 0; i < count; i++) {SPDR = *ptr++; while (!TEST(SPSR, SPIF));} DELAY_10US; }
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#else // !HARDWARE_SPI
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2017-10-10 00:13:16 +02:00
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#define ST7565_SND_BIT \
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WRITE(ST7565_CLK_PIN, LOW); ST7565_DELAY_1; \
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WRITE(ST7565_DAT_PIN, val & 0x80); ST7565_DELAY_2; \
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WRITE(ST7565_CLK_PIN, HIGH); ST7565_DELAY_3; \
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WRITE(ST7565_CLK_PIN, LOW);\
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val <<= 1
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static void ST7565_SWSPI_SND_8BIT(uint8_t val) {
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ST7565_SND_BIT; // 1
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ST7565_SND_BIT; // 2
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ST7565_SND_BIT; // 3
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ST7565_SND_BIT; // 4
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ST7565_SND_BIT; // 5
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ST7565_SND_BIT; // 6
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ST7565_SND_BIT; // 7
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ST7565_SND_BIT; // 8
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}
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#define ST7565_WRITE_BYTE(a) { ST7565_SWSPI_SND_8BIT((uint8_t)a); U8G_DELAY(); }
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2018-02-16 09:28:42 +01:00
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#define ST7560_WriteSequence(count, pointer) { uint8_t *ptr = pointer; for (uint8_t i = 0; i < count; i++) { ST7565_SWSPI_SND_8BIT(*ptr++); } DELAY_10US; }
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#endif // !HARDWARE_SPI
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2017-10-10 00:13:16 +02:00
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2018-05-12 11:22:55 +02:00
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#if DOGM_SPI_DELAY_US > 0
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#define U8G_DELAY() DELAY_US(DOGM_SPI_DELAY_US)
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2017-10-10 00:13:16 +02:00
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#else
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#define U8G_DELAY() u8g_10MicroDelay()
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#endif
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2018-06-02 08:00:58 +02:00
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#define ST7565_CS() do{ WRITE(ST7565_CS_PIN, HIGH); U8G_DELAY(); }while(0)
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#define ST7565_NCS() WRITE(ST7565_CS_PIN, LOW)
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#define ST7565_A0() do{ WRITE(ST7565_A0_PIN, HIGH); U8G_DELAY(); }while(0)
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#define ST7565_NA0() WRITE(ST7565_A0_PIN, LOW)
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#define ST7565_ADC_REVERSE(N) ST7565_WRITE_BYTE(0xA0 | ((N) & 0x1))
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#define ST7565_BIAS_MODE(N) ST7565_WRITE_BYTE(0xA2 | ((N) & 0x1))
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#define ST7565_ALL_PIX(N) ST7565_WRITE_BYTE(0xA4 | ((N) & 0x1))
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#define ST7565_INVERTED(N) ST7565_WRITE_BYTE(0xA6 | ((N) & 0x1))
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#define ST7565_ON(N) ST7565_WRITE_BYTE(0xAE | ((N) & 0x1))
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#define ST7565_OUT_MODE(N) ST7565_WRITE_BYTE(0xC0 | ((N) & 0x1) << 3)
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#define ST7565_POWER_CONTROL(N) ST7565_WRITE_BYTE(0x28 | (N))
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#define ST7565_V0_RATIO(N) ST7565_WRITE_BYTE(0x20 | ((N) & 0x7))
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#define ST7565_CONTRAST(N) do{ ST7565_WRITE_BYTE(0x81); ST7565_WRITE_BYTE(N); }while(0)
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2018-06-06 05:46:45 +02:00
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#define ST7565_COLUMN_ADR(N) do{ ST7565_WRITE_BYTE(0x10 | (((N) >> 4) & 0xF)); ST7565_WRITE_BYTE((N) & 0xF); }while(0)
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2018-06-02 08:00:58 +02:00
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#define ST7565_PAGE_ADR(N) ST7565_WRITE_BYTE(0xB0 | (N))
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#define ST7565_START_LINE(N) ST7565_WRITE_BYTE(0x40 | (N))
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#define ST7565_SLEEP_MODE() ST7565_WRITE_BYTE(0xAC)
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#define ST7565_NOOP() ST7565_WRITE_BYTE(0xE3)
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2017-10-10 00:13:16 +02:00
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uint8_t u8g_dev_st7565_64128n_2x_VIKI_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
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switch (msg) {
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2018-02-16 09:28:42 +01:00
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2017-10-10 00:13:16 +02:00
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case U8G_DEV_MSG_INIT: {
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2018-02-16 09:28:42 +01:00
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2017-10-10 00:13:16 +02:00
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OUT_WRITE(ST7565_CS_PIN, LOW);
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2018-02-16 09:28:42 +01:00
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OUT_WRITE(ST7565_DAT_PIN, LOW);
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OUT_WRITE(ST7565_CLK_PIN, LOW);
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#if HARDWARE_SPI
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2018-06-02 08:00:58 +02:00
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OUT_WRITE(SDSS, 1); // must be set to an output first or else will never go into master mode
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SPCR = 0x50; // enable SPI in master mode at fast speed
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SPSR = 1; // kick it up to 2x speed mode
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2017-10-10 00:13:16 +02:00
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#endif
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2018-02-16 09:28:42 +01:00
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2017-10-10 00:13:16 +02:00
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OUT_WRITE(ST7565_A0_PIN, LOW);
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2018-06-02 08:00:58 +02:00
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ST7565_CS(); // chip select off
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ST7565_NA0(); // instruction mode
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ST7565_NCS(); // chip select
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2017-10-10 00:13:16 +02:00
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2018-06-02 08:00:58 +02:00
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ST7565_BIAS_MODE(0); // 0xA2: LCD bias 1/9 (according to Displaytech 64128N datasheet)
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ST7565_ADC_REVERSE(0); // Normal (not flipped) ADC Select (according to Displaytech 64128N datasheet)
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2017-10-10 00:13:16 +02:00
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2018-06-02 08:00:58 +02:00
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ST7565_OUT_MODE(1); // common output mode: set scan direction normal operation/SHL Select; 0x0C0 --> SHL = 0; normal; 0x0C8 --> SHL = 1
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ST7565_START_LINE(0); // Display start line for Displaytech 64128N
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2017-10-10 00:13:16 +02:00
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2018-06-02 08:00:58 +02:00
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//ST7565_POWER_CONTROL(0x4); // power control: turn on Booster
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//U8G_ESC_DLY(50); // delay 50 ms - hangs after a reset if used
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2017-10-10 00:13:16 +02:00
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2018-06-02 08:00:58 +02:00
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//ST7565_POWER_CONTROL(0x6); // power control: turn on Booster, Voltage Regulator
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//U8G_ESC_DLY(50); // delay 50 ms - hangs after a reset if used
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2017-10-10 00:13:16 +02:00
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2018-06-02 08:00:58 +02:00
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ST7565_POWER_CONTROL(0x7); // power control: turn on Booster, Voltage Regulator, Voltage Follower
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//U8G_ESC_DLY(50); // delay 50 ms - hangs after a reset if used
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2017-10-10 00:13:16 +02:00
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2018-06-02 08:00:58 +02:00
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ST7565_V0_RATIO(0); // Set V0 Voltage Resistor ratio. Setting for controlling brightness of Displaytech 64128N
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2017-10-10 00:13:16 +02:00
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2018-06-02 08:00:58 +02:00
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ST7565_INVERTED(0); // display normal, bit val 0: LCD pixel off.
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2017-10-10 00:13:16 +02:00
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2018-06-02 08:00:58 +02:00
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ST7565_CONTRAST(0x1E); // Contrast value. Setting for controlling contrast of Displaytech 64128N
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2017-10-10 00:13:16 +02:00
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2018-06-02 08:00:58 +02:00
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ST7565_ON(1); // display on
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2017-10-10 00:13:16 +02:00
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2018-06-02 08:00:58 +02:00
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U8G_ESC_DLY(100); // delay 100 ms
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ST7565_ALL_PIX(1); // display all points; ST7565
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U8G_ESC_DLY(100); // delay 100 ms
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U8G_ESC_DLY(100); // delay 100 ms
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ST7565_ALL_PIX(0); // normal display
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ST7565_CS(); // chip select off
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} // end of sequence
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2017-10-10 00:13:16 +02:00
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break;
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case U8G_DEV_MSG_STOP: break;
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case U8G_DEV_MSG_PAGE_NEXT: {
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2018-06-02 08:00:58 +02:00
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u8g_pb_t *pb = (u8g_pb_t*)(dev->dev_mem);
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ST7565_CS(); // chip select off
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ST7565_NA0(); // instruction mode
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ST7565_NCS(); // chip select
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ST7565_COLUMN_ADR(0x00); // high 4 bits to 0, low 4 bits to 0. Changed for DisplayTech 64128N
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// end of sequence
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ST7565_PAGE_ADR(2 * pb->p.page); // select current page (ST7565R)
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ST7565_A0(); // data mode
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ST7560_WriteSequence((uint8_t)pb->width, (uint8_t*)pb->buf);
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ST7565_CS(); // chip select off
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ST7565_NA0(); // instruction mode
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ST7565_NCS(); // chip select
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ST7565_COLUMN_ADR(0x00); // high 4 bits to 0, low 4 bits to 0
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// end of sequence
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ST7565_PAGE_ADR(2 * pb->p.page + 1); // select current page (ST7565R)
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ST7565_A0(); // data mode
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ST7560_WriteSequence((uint8_t)pb->width, (uint8_t*)(pb->buf) + pb->width);
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ST7565_CS(); // chip select off
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2017-10-10 00:13:16 +02:00
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}
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break;
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case U8G_DEV_MSG_CONTRAST:
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ST7565_NCS();
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2018-06-02 08:00:58 +02:00
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ST7565_NA0(); // instruction mode
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ST7565_CONTRAST((*(uint8_t*)arg) >> 2);
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ST7565_CS(); // chip select off
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2017-10-10 00:13:16 +02:00
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return 1;
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case U8G_DEV_MSG_SLEEP_ON:
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2018-06-02 08:00:58 +02:00
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ST7565_NA0(); // instruction mode
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ST7565_NCS(); // chip select
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ST7565_SLEEP_MODE(); // static indicator off
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//ST7565_WRITE_BYTE(0x00); // indicator register set (not sure if this is required)
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ST7565_ON(0); // display off
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ST7565_ALL_PIX(1); // all points on
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ST7565_CS(); // chip select off
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2017-10-10 00:13:16 +02:00
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return 1;
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case U8G_DEV_MSG_SLEEP_OFF:
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2018-06-02 08:00:58 +02:00
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ST7565_NA0(); // instruction mode
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ST7565_NCS(); // chip select
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ST7565_ALL_PIX(0); // all points off
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ST7565_ON(1); // display on
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U8G_ESC_DLY(50); // delay 50 ms
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ST7565_CS(); // chip select off
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2017-10-10 00:13:16 +02:00
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return 1;
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}
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return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
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}
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2018-06-02 08:00:58 +02:00
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uint8_t u8g_dev_st7565_64128n_2x_VIKI_buf[LCD_PIXEL_WIDTH * 2] U8G_NOCOMMON;
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2017-10-10 00:13:16 +02:00
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u8g_pb_t u8g_dev_st7565_64128n_2x_VIKI_pb = {{16, LCD_PIXEL_HEIGHT, 0, 0, 0}, LCD_PIXEL_WIDTH, u8g_dev_st7565_64128n_2x_VIKI_buf};
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u8g_dev_t u8g_dev_st7565_64128n_2x_VIKI_sw_spi = {u8g_dev_st7565_64128n_2x_VIKI_fn, &u8g_dev_st7565_64128n_2x_VIKI_pb, &u8g_com_null_fn};
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class U8GLIB_ST7565_64128n_2x_VIKI : public U8GLIB {
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public:
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U8GLIB_ST7565_64128n_2x_VIKI(uint8_t dummy)
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: U8GLIB(&u8g_dev_st7565_64128n_2x_VIKI_sw_spi)
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{ }
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U8GLIB_ST7565_64128n_2x_VIKI(uint8_t sck, uint8_t mosi, uint8_t cs, uint8_t a0, uint8_t reset = U8G_PIN_NONE)
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: U8GLIB(&u8g_dev_st7565_64128n_2x_VIKI_sw_spi)
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{ }
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};
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#pragma GCC reset_options
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#endif // ULCDST7565_H
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