2017-06-17 23:19:42 +02:00
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/**
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* Marlin 3D Printer Firmware
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2020-02-03 15:00:57 +01:00
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* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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2017-06-17 23:19:42 +02:00
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*
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* Based on Sprinter and grbl.
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2019-06-28 06:57:50 +02:00
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* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
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2017-06-17 23:19:42 +02:00
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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2020-07-23 05:20:14 +02:00
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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2017-06-17 23:19:42 +02:00
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*
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*/
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/**
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* Software SPI functions originally from Arduino Sd2Card Library
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2019-06-28 06:57:50 +02:00
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* Copyright (c) 2009 by William Greiman
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2017-06-17 23:19:42 +02:00
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*/
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/**
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* For TARGET_LPC1768
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*/
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2017-06-18 01:36:10 +02:00
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/**
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2020-08-26 12:13:58 +02:00
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* Hardware SPI and Software SPI implementations are included in this file.
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2017-06-18 01:36:10 +02:00
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* The hardware SPI runs faster and has higher throughput but is not compatible
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* with some LCD interfaces/adapters.
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*
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* Control of the slave select pin(s) is handled by the calling routines.
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*
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* Some of the LCD interfaces/adapters result in the LCD SPI and the SD card
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* SPI sharing pins. The SCK, MOSI & MISO pins can NOT be set/cleared with
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* WRITE nor digitalWrite when the hardware SPI module within the LPC17xx is
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* active. If any of these pins are shared then the software SPI must be used.
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*
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* A more sophisticated hardware SPI can be found at the following link. This
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* implementation has not been fully debugged.
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* https://github.com/MarlinFirmware/Marlin/tree/071c7a78f27078fd4aee9a3ef365fcf5e143531e
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*/
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2017-06-17 23:19:42 +02:00
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#ifdef TARGET_LPC1768
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2018-02-23 07:52:52 +01:00
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#include "../../inc/MarlinConfig.h"
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#include <SPI.h>
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2017-06-17 23:19:42 +02:00
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2020-08-26 12:13:58 +02:00
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// Hardware SPI and SPIClass
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#include <lpc17xx_pinsel.h>
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#include <lpc17xx_clkpwr.h>
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2019-07-10 05:30:06 +02:00
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// ------------------------
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2017-06-17 23:19:42 +02:00
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// Public functions
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2019-07-10 05:30:06 +02:00
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// ------------------------
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2017-06-18 01:36:10 +02:00
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#if ENABLED(LPC_SOFTWARE_SPI)
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2018-02-04 02:33:26 +01:00
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2019-11-13 05:16:54 +01:00
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#include <SoftwareSPI.h>
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2018-02-04 02:33:26 +01:00
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// Software SPI
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2017-06-18 01:36:10 +02:00
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static uint8_t SPI_speed = 0;
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2019-02-04 15:27:47 +01:00
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static uint8_t spiTransfer(uint8_t b) {
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2018-02-04 02:33:26 +01:00
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return swSpiTransfer(b, SPI_speed, SCK_PIN, MISO_PIN, MOSI_PIN);
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2017-06-17 23:19:42 +02:00
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}
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2019-02-04 15:27:47 +01:00
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void spiBegin() {
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2018-02-04 02:33:26 +01:00
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swSpiBegin(SCK_PIN, MISO_PIN, MOSI_PIN);
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2017-06-17 23:19:42 +02:00
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}
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2019-02-04 15:27:47 +01:00
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void spiInit(uint8_t spiRate) {
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2018-02-04 02:33:26 +01:00
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SPI_speed = swSpiInit(spiRate, SCK_PIN, MOSI_PIN);
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2017-06-17 23:19:42 +02:00
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}
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2019-02-04 15:27:47 +01:00
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uint8_t spiRec() { return spiTransfer(0xFF); }
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2017-06-17 23:19:42 +02:00
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2019-02-04 15:27:47 +01:00
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void spiRead(uint8_t*buf, uint16_t nbyte) {
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2019-02-20 11:00:49 +01:00
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for (int i = 0; i < nbyte; i++)
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buf[i] = spiTransfer(0xFF);
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2017-06-17 23:19:42 +02:00
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}
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2019-02-04 15:27:47 +01:00
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void spiSend(uint8_t b) { (void)spiTransfer(b); }
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2017-06-17 23:19:42 +02:00
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2019-02-20 11:00:49 +01:00
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void spiSend(const uint8_t* buf, size_t nbyte) {
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for (uint16_t i = 0; i < nbyte; i++)
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(void)spiTransfer(buf[i]);
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2017-06-17 23:19:42 +02:00
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}
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2019-02-04 15:27:47 +01:00
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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2019-02-04 14:08:39 +01:00
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(void)spiTransfer(token);
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for (uint16_t i = 0; i < 512; i++)
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(void)spiTransfer(buf[i]);
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2017-06-17 23:19:42 +02:00
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}
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2017-06-18 01:36:10 +02:00
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2017-06-17 23:19:42 +02:00
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#else
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2017-06-18 01:36:10 +02:00
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2019-02-04 15:27:47 +01:00
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void spiBegin() { // setup SCK, MOSI & MISO pins for SSP0
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2020-09-10 07:41:26 +02:00
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spiInit(SPI_SPEED);
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2017-06-17 23:19:42 +02:00
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}
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2019-02-04 15:27:47 +01:00
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void spiInit(uint8_t spiRate) {
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2020-09-10 07:41:26 +02:00
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#if MISO_PIN == BOARD_SPI1_MISO_PIN
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SPI.setModule(1);
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#elif MISO_PIN == BOARD_SPI2_MISO_PIN
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SPI.setModule(2);
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#endif
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SPI.setDataSize(DATA_SIZE_8BIT);
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SPI.setDataMode(SPI_MODE0);
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SPI.setClock(SPISettings::spiRate2Clock(spiRate));
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SPI.begin();
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2018-09-19 19:33:20 +02:00
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}
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2019-02-04 15:27:47 +01:00
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static uint8_t doio(uint8_t b) {
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2020-09-10 07:41:26 +02:00
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return SPI.transfer(b & 0x00FF) & 0x00FF;
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2017-06-17 23:19:42 +02:00
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}
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2019-02-04 15:27:47 +01:00
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void spiSend(uint8_t b) { doio(b); }
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2017-06-18 01:36:10 +02:00
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2019-02-20 11:00:49 +01:00
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void spiSend(const uint8_t* buf, size_t nbyte) {
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for (uint16_t i = 0; i < nbyte; i++) doio(buf[i]);
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2017-08-03 00:45:42 +02:00
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}
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2019-02-04 15:27:47 +01:00
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void spiSend(uint32_t chan, byte b) {
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2017-08-03 00:45:42 +02:00
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}
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2019-02-20 11:00:49 +01:00
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void spiSend(uint32_t chan, const uint8_t* buf, size_t nbyte) {
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2017-06-18 01:36:10 +02:00
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}
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2017-08-03 00:45:42 +02:00
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2017-06-17 23:19:42 +02:00
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// Read single byte from SPI
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2019-02-04 15:27:47 +01:00
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uint8_t spiRec() { return doio(0xFF); }
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2017-08-03 00:45:42 +02:00
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2019-02-04 15:27:47 +01:00
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uint8_t spiRec(uint32_t chan) { return 0; }
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2017-06-17 23:19:42 +02:00
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// Read from SPI into buffer
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2019-02-20 11:00:49 +01:00
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void spiRead(uint8_t *buf, uint16_t nbyte) {
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for (uint16_t i = 0; i < nbyte; i++) buf[i] = doio(0xFF);
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2017-06-17 23:19:42 +02:00
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}
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2020-08-26 12:13:58 +02:00
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uint8_t spiTransfer(uint8_t b) {
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2019-02-04 15:27:47 +01:00
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return doio(b);
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}
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2018-02-04 02:33:26 +01:00
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2017-06-17 23:19:42 +02:00
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// Write from buffer to SPI
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2019-02-04 15:27:47 +01:00
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void spiSendBlock(uint8_t token, const uint8_t* buf) {
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(void)spiTransfer(token);
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2019-02-04 14:08:39 +01:00
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for (uint16_t i = 0; i < 512; i++)
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(void)spiTransfer(buf[i]);
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2017-06-17 23:19:42 +02:00
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}
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2018-01-03 12:12:25 +01:00
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/** Begin SPI transaction, set clock, bit order, data mode */
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2019-02-04 15:27:47 +01:00
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void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
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2018-01-03 12:12:25 +01:00
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// TODO: to be implemented
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2018-01-05 17:10:55 +01:00
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}
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2020-04-20 07:01:14 +02:00
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#endif // LPC_SOFTWARE_SPI
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2017-06-17 23:19:42 +02:00
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2020-08-26 12:13:58 +02:00
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/**
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* @brief Wait until TXE (tx empty) flag is set and BSY (busy) flag unset.
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*/
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static inline void waitSpiTxEnd(LPC_SSP_TypeDef *spi_d) {
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while (SSP_GetStatus(spi_d, SSP_STAT_TXFIFO_EMPTY) == RESET) { /* nada */ } // wait until TXE=1
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while (SSP_GetStatus(spi_d, SSP_STAT_BUSY) == SET) { /* nada */ } // wait until BSY=0
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}
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SPIClass::SPIClass(uint8_t device) {
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// Init things specific to each SPI device
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// clock divider setup is a bit of hack, and needs to be improved at a later date.
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PINSEL_CFG_Type PinCfg; // data structure to hold init values
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#if BOARD_NR_SPI >= 1
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_settings[0].spi_d = LPC_SSP0;
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2020-09-10 07:41:26 +02:00
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_settings[0].dataMode = SPI_MODE0;
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_settings[0].dataSize = DATA_SIZE_8BIT;
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_settings[0].clock = SPI_CLOCK_MAX;
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2020-08-26 12:13:58 +02:00
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// _settings[0].clockDivider = determine_baud_rate(_settings[0].spi_d, _settings[0].clock);
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PinCfg.Funcnum = 2;
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PinCfg.OpenDrain = 0;
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PinCfg.Pinmode = 0;
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PinCfg.Pinnum = LPC176x::pin_bit(BOARD_SPI1_SCK_PIN);
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PinCfg.Portnum = LPC176x::pin_port(BOARD_SPI1_SCK_PIN);
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PINSEL_ConfigPin(&PinCfg);
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SET_OUTPUT(BOARD_SPI1_SCK_PIN);
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PinCfg.Pinnum = LPC176x::pin_bit(BOARD_SPI1_MISO_PIN);
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PinCfg.Portnum = LPC176x::pin_port(BOARD_SPI1_MISO_PIN);
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PINSEL_ConfigPin(&PinCfg);
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SET_INPUT(BOARD_SPI1_MISO_PIN);
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PinCfg.Pinnum = LPC176x::pin_bit(BOARD_SPI1_MOSI_PIN);
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PinCfg.Portnum = LPC176x::pin_port(BOARD_SPI1_MOSI_PIN);
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PINSEL_ConfigPin(&PinCfg);
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SET_OUTPUT(BOARD_SPI1_MOSI_PIN);
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#endif
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#if BOARD_NR_SPI >= 2
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_settings[1].spi_d = LPC_SSP1;
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2020-09-10 07:41:26 +02:00
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_settings[1].dataMode = SPI_MODE0;
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_settings[1].dataSize = DATA_SIZE_8BIT;
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_settings[1].clock = SPI_CLOCK_MAX;
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2020-08-26 12:13:58 +02:00
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// _settings[1].clockDivider = determine_baud_rate(_settings[1].spi_d, _settings[1].clock);
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PinCfg.Funcnum = 2;
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PinCfg.OpenDrain = 0;
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PinCfg.Pinmode = 0;
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PinCfg.Pinnum = LPC176x::pin_bit(BOARD_SPI2_SCK_PIN);
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PinCfg.Portnum = LPC176x::pin_port(BOARD_SPI2_SCK_PIN);
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PINSEL_ConfigPin(&PinCfg);
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SET_OUTPUT(BOARD_SPI2_SCK_PIN);
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PinCfg.Pinnum = LPC176x::pin_bit(BOARD_SPI2_MISO_PIN);
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PinCfg.Portnum = LPC176x::pin_port(BOARD_SPI2_MISO_PIN);
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PINSEL_ConfigPin(&PinCfg);
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SET_INPUT(BOARD_SPI2_MISO_PIN);
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PinCfg.Pinnum = LPC176x::pin_bit(BOARD_SPI2_MOSI_PIN);
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PinCfg.Portnum = LPC176x::pin_port(BOARD_SPI2_MOSI_PIN);
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PINSEL_ConfigPin(&PinCfg);
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SET_OUTPUT(BOARD_SPI2_MOSI_PIN);
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#endif
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setModule(device);
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/* Initialize GPDMA controller */
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//TODO: call once in the constructor? or each time?
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GPDMA_Init();
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}
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void SPIClass::begin() {
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updateSettings();
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SSP_Cmd(_currentSetting->spi_d, ENABLE); // start SSP running
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}
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2018-02-04 02:33:26 +01:00
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2020-04-27 12:13:47 +02:00
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void SPIClass::beginTransaction(const SPISettings &cfg) {
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2020-08-26 12:13:58 +02:00
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setBitOrder(cfg.bitOrder);
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setDataMode(cfg.dataMode);
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setDataSize(cfg.dataSize);
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//setClockDivider(determine_baud_rate(_currentSetting->spi_d, settings.clock));
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begin();
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2018-04-06 22:24:18 +02:00
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}
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2020-08-26 12:13:58 +02:00
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uint8_t SPIClass::transfer(const uint16_t b) {
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/* send and receive a single byte */
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SSP_ReceiveData(_currentSetting->spi_d); // read any previous data
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SSP_SendData(_currentSetting->spi_d, b);
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waitSpiTxEnd(_currentSetting->spi_d); // wait for it to finish
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return SSP_ReceiveData(_currentSetting->spi_d);
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}
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2019-02-04 14:08:39 +01:00
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uint16_t SPIClass::transfer16(const uint16_t data) {
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2019-02-04 15:27:47 +01:00
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return (transfer((data >> 8) & 0xFF) << 8)
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2019-02-04 14:08:39 +01:00
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| (transfer(data & 0xFF) & 0xFF);
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2018-02-04 02:33:26 +01:00
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}
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2020-08-26 12:13:58 +02:00
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void SPIClass::end() {
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// SSP_Cmd(_currentSetting->spi_d, DISABLE); // stop device or SSP_DeInit?
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SSP_DeInit(_currentSetting->spi_d);
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}
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void SPIClass::send(uint8_t data) {
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SSP_SendData(_currentSetting->spi_d, data);
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}
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void SPIClass::dmaSend(void *buf, uint16_t length, bool minc) {
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//TODO: LPC dma can only write 0xFFF bytes at once.
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GPDMA_Channel_CFG_Type GPDMACfg;
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/* Configure GPDMA channel 0 -------------------------------------------------------------*/
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/* DMA Channel 0 */
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GPDMACfg.ChannelNum = 0;
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// Source memory
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GPDMACfg.SrcMemAddr = (uint32_t)buf;
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// Destination memory - Not used
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GPDMACfg.DstMemAddr = 0;
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// Transfer size
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2020-09-10 07:41:26 +02:00
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GPDMACfg.TransferSize = length;
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2020-08-26 12:13:58 +02:00
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// Transfer width
|
|
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GPDMACfg.TransferWidth = (_currentSetting->dataSize == DATA_SIZE_16BIT) ? GPDMA_WIDTH_HALFWORD : GPDMA_WIDTH_BYTE;
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|
|
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// Transfer type
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|
|
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GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
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|
|
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// Source connection - unused
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|
|
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GPDMACfg.SrcConn = 0;
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|
|
|
// Destination connection
|
|
|
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GPDMACfg.DstConn = (_currentSetting->spi_d == LPC_SSP0) ? GPDMA_CONN_SSP0_Tx : GPDMA_CONN_SSP1_Tx;
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GPDMACfg.DMALLI = 0;
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|
|
|
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|
|
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// Enable dma on SPI
|
|
|
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SSP_DMACmd(_currentSetting->spi_d, SSP_DMA_TX, ENABLE);
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|
|
|
|
2020-09-10 07:41:26 +02:00
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// only increase memory if minc is true
|
|
|
|
GPDMACfg.MemoryIncrease = (minc ? GPDMA_DMACCxControl_SI : 0);
|
2020-08-26 12:13:58 +02:00
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|
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|
2020-09-10 07:41:26 +02:00
|
|
|
// Setup channel with given parameter
|
|
|
|
GPDMA_Setup(&GPDMACfg);
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2020-08-26 12:13:58 +02:00
|
|
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2020-09-10 07:41:26 +02:00
|
|
|
// enabled dma
|
|
|
|
GPDMA_ChannelCmd(0, ENABLE);
|
2020-08-26 12:13:58 +02:00
|
|
|
|
2020-09-10 07:41:26 +02:00
|
|
|
// wait data transfer
|
|
|
|
while (!GPDMA_IntGetStatus(GPDMA_STAT_RAWINTTC, 0) && !GPDMA_IntGetStatus(GPDMA_STAT_RAWINTERR, 0)) { }
|
2020-08-26 12:13:58 +02:00
|
|
|
|
2020-09-10 07:41:26 +02:00
|
|
|
// clear err and int
|
|
|
|
GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
|
|
|
|
GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
|
2020-08-26 12:13:58 +02:00
|
|
|
|
2020-09-10 07:41:26 +02:00
|
|
|
// dma disable
|
|
|
|
GPDMA_ChannelCmd(0, DISABLE);
|
2020-08-26 12:13:58 +02:00
|
|
|
|
|
|
|
waitSpiTxEnd(_currentSetting->spi_d);
|
|
|
|
|
|
|
|
SSP_DMACmd(_currentSetting->spi_d, SSP_DMA_TX, DISABLE);
|
|
|
|
}
|
|
|
|
|
|
|
|
uint16_t SPIClass::read() {
|
|
|
|
return SSP_ReceiveData(_currentSetting->spi_d);
|
|
|
|
}
|
|
|
|
|
|
|
|
void SPIClass::read(uint8_t *buf, uint32_t len) {
|
|
|
|
for (uint16_t i = 0; i < len; i++) buf[i] = transfer(0xFF);
|
|
|
|
}
|
|
|
|
|
|
|
|
void SPIClass::setClock(uint32_t clock) {
|
|
|
|
_currentSetting->clock = clock;
|
|
|
|
}
|
|
|
|
|
|
|
|
void SPIClass::setModule(uint8_t device) {
|
|
|
|
_currentSetting = &_settings[device - 1];// SPI channels are called 1 2 and 3 but the array is zero indexed
|
|
|
|
}
|
|
|
|
|
|
|
|
void SPIClass::setBitOrder(uint8_t bitOrder) {
|
|
|
|
_currentSetting->bitOrder = bitOrder;
|
|
|
|
}
|
|
|
|
|
|
|
|
void SPIClass::setDataMode(uint8_t dataMode) {
|
2020-09-10 07:41:26 +02:00
|
|
|
_currentSetting->dataMode = dataMode;
|
2020-08-26 12:13:58 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void SPIClass::setDataSize(uint32_t ds) {
|
|
|
|
_currentSetting->dataSize = ds;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Set up/tear down
|
|
|
|
*/
|
|
|
|
void SPIClass::updateSettings() {
|
|
|
|
//SSP_DeInit(_currentSetting->spi_d); //todo: need force de init?!
|
|
|
|
|
|
|
|
// divide PCLK by 2 for SSP0
|
|
|
|
CLKPWR_SetPCLKDiv(_currentSetting->spi_d == LPC_SSP0 ? CLKPWR_PCLKSEL_SSP0 : CLKPWR_PCLKSEL_SSP1, CLKPWR_PCLKSEL_CCLK_DIV_2);
|
|
|
|
|
|
|
|
SSP_CFG_Type HW_SPI_init; // data structure to hold init values
|
|
|
|
SSP_ConfigStructInit(&HW_SPI_init); // set values for SPI mode
|
|
|
|
HW_SPI_init.ClockRate = _currentSetting->clock;
|
|
|
|
HW_SPI_init.Databit = _currentSetting->dataSize;
|
|
|
|
|
|
|
|
/**
|
|
|
|
* SPI Mode CPOL CPHA Shift SCK-edge Capture SCK-edge
|
|
|
|
* 0 0 0 Falling Rising
|
|
|
|
* 1 0 1 Rising Falling
|
|
|
|
* 2 1 0 Rising Falling
|
|
|
|
* 3 1 1 Falling Rising
|
|
|
|
*/
|
|
|
|
switch (_currentSetting->dataMode) {
|
|
|
|
case SPI_MODE0:
|
|
|
|
HW_SPI_init.CPHA = SSP_CPHA_FIRST;
|
2020-09-10 00:56:01 +02:00
|
|
|
HW_SPI_init.CPOL = SSP_CPOL_HI;
|
2020-08-26 12:13:58 +02:00
|
|
|
break;
|
|
|
|
case SPI_MODE1:
|
|
|
|
HW_SPI_init.CPHA = SSP_CPHA_SECOND;
|
2020-09-10 00:56:01 +02:00
|
|
|
HW_SPI_init.CPOL = SSP_CPOL_HI;
|
2020-08-26 12:13:58 +02:00
|
|
|
break;
|
|
|
|
case SPI_MODE2:
|
|
|
|
HW_SPI_init.CPHA = SSP_CPHA_FIRST;
|
2020-09-10 00:56:01 +02:00
|
|
|
HW_SPI_init.CPOL = SSP_CPOL_LO;
|
2020-08-26 12:13:58 +02:00
|
|
|
break;
|
|
|
|
case SPI_MODE3:
|
|
|
|
HW_SPI_init.CPHA = SSP_CPHA_SECOND;
|
2020-09-10 00:56:01 +02:00
|
|
|
HW_SPI_init.CPOL = SSP_CPOL_LO;
|
2020-08-26 12:13:58 +02:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
// TODO: handle bitOrder
|
|
|
|
SSP_Init(_currentSetting->spi_d, &HW_SPI_init); // puts the values into the proper bits in the SSP0 registers
|
|
|
|
}
|
|
|
|
|
|
|
|
#if MISO_PIN == BOARD_SPI1_MISO_PIN
|
|
|
|
SPIClass SPI(1);
|
|
|
|
#elif MISO_PIN == BOARD_SPI2_MISO_PIN
|
|
|
|
SPIClass SPI(2);
|
|
|
|
#endif
|
2018-02-04 02:33:26 +01:00
|
|
|
|
2017-06-17 23:19:42 +02:00
|
|
|
#endif // TARGET_LPC1768
|