🎨 Format some lib-uhs3 code

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Scott Lahteine 2022-10-30 15:41:19 -05:00
parent 4737af7d70
commit 2778b00765

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@ -1,24 +1,27 @@
/* Copyright (C) 2015-2016 Andrew J. Kroll /*
and * Copyright (C) 2015-2016 Andrew J. Kroll
Copyright (C) 2011 Circuits At Home, LTD. All rights reserved. * and
* Copyright (C) 2011 Circuits At Home, LTD. All rights reserved.
This software may be distributed and modified under the terms of the GNU *
General Public License version 2 (GPL2) as publishe7d by the Free Software * This software may be distributed and modified under the terms of the GNU
Foundation and appearing in the file GPL2.TXT included in the packaging of * General Public License version 2 (GPL2) as publishe7d by the Free Software
this file. Please note that GPL2 Section 2[b] requires that all works based * Foundation and appearing in the file GPL2.TXT included in the packaging of
on this software must also be made publicly available under the terms of * this file. Please note that GPL2 Section 2[b] requires that all works based
the GPL2 ("Copyleft"). * on this software must also be made publicly available under the terms of
* the GPL2 ("Copyleft").
Contact information *
------------------- * Contact information
* -------------------
Circuits At Home, LTD *
Web : https://www.circuitsathome.com * Circuits At Home, LTD
e-mail : support@circuitsathome.com * Web : https://www.circuitsathome.com
* e-mail : support@circuitsathome.com
*
*/ */
#if defined(USB_HOST_SHIELD_H) && !defined(USB_HOST_SHIELD_LOADED) #if defined(USB_HOST_SHIELD_H) && !defined(USB_HOST_SHIELD_LOADED)
#define USB_HOST_SHIELD_LOADED #define USB_HOST_SHIELD_LOADED
#include <Arduino.h> #include <Arduino.h>
#ifndef digitalPinToInterrupt #ifndef digitalPinToInterrupt
@ -60,8 +63,8 @@ void UHS_NI MAX3421E_HOST::resume_host() {
} }
interrupts(); interrupts();
#endif #endif
} }
/* write single byte into MAX3421e register */ /* write single byte into MAX3421e register */
void UHS_NI MAX3421E_HOST::regWr(uint8_t reg, uint8_t data) { void UHS_NI MAX3421E_HOST::regWr(uint8_t reg, uint8_t data) {
SPIclass.beginTransaction(MAX3421E_SPI_Settings); SPIclass.beginTransaction(MAX3421E_SPI_Settings);
@ -72,7 +75,6 @@ void UHS_NI MAX3421E_HOST::regWr(uint8_t reg, uint8_t data) {
SPIclass.endTransaction(); SPIclass.endTransaction();
} }
/* multiple-byte write */ /* multiple-byte write */
/* returns a pointer to memory position after last written */ /* returns a pointer to memory position after last written */
@ -93,6 +95,7 @@ uint8_t* UHS_NI MAX3421E_HOST::bytesWr(uint8_t reg, uint8_t nbytes, uint8_t *dat
//printf("\r\n"); //printf("\r\n");
return (data_p); return (data_p);
} }
/* GPIO write */ /* GPIO write */
/*GPIO byte is split between 2 registers, so two writes are needed to write one byte */ /*GPIO byte is split between 2 registers, so two writes are needed to write one byte */
@ -173,7 +176,6 @@ void UHS_NI MAX3421E_HOST::VBUS_changed() {
//printf("\r\n\r\n\r\n\r\nSTATE %2.2x -> ", usb_task_state); //printf("\r\n\r\n\r\n\r\nSTATE %2.2x -> ", usb_task_state);
switch (vbusState) { switch (vbusState) {
case LSHOST: // Low speed case LSHOST: // Low speed
speed = 0; speed = 0;
// Intentional fall-through // Intentional fall-through
case FSHOST: // Full speed case FSHOST: // Full speed
@ -208,7 +210,7 @@ void UHS_NI MAX3421E_HOST::VBUS_changed() {
usb_host_speed = speed; usb_host_speed = speed;
//printf("0x%2.2x\r\n\r\n\r\n\r\n", usb_task_state); //printf("0x%2.2x\r\n\r\n\r\n\r\n", usb_task_state);
return; return;
}; }
/** /**
* Probe bus to determine device presence and speed, * Probe bus to determine device presence and speed,
@ -220,7 +222,7 @@ void UHS_NI MAX3421E_HOST::busprobe() {
bus_sample = regRd(rHRSL); // Get J,K status bus_sample = regRd(rHRSL); // Get J,K status
bus_sample &= (bmJSTATUS | bmKSTATUS); // zero the rest of the byte bus_sample &= (bmJSTATUS | bmKSTATUS); // zero the rest of the byte
switch (bus_sample) { // start full-speed or low-speed host switch (bus_sample) { // start full-speed or low-speed host
case(bmJSTATUS): case bmJSTATUS:
// Serial.println("J"); // Serial.println("J");
if ((regRd(rMODE) & bmLOWSPEED) == 0) { if ((regRd(rMODE) & bmLOWSPEED) == 0) {
regWr(rMODE, MODE_FS_HOST); // start full-speed host regWr(rMODE, MODE_FS_HOST); // start full-speed host
@ -236,7 +238,7 @@ void UHS_NI MAX3421E_HOST::busprobe() {
regWr(rHIRQ, bmFRAMEIRQ); // see data sheet. regWr(rHIRQ, bmFRAMEIRQ); // see data sheet.
regWr(rMODE, tmpdata); regWr(rMODE, tmpdata);
break; break;
case(bmKSTATUS): case bmKSTATUS:
// Serial.println("K"); // Serial.println("K");
if ((regRd(rMODE) & bmLOWSPEED) == 0) { if ((regRd(rMODE) & bmLOWSPEED) == 0) {
regWr(rMODE, MODE_LS_HOST); // start low-speed host regWr(rMODE, MODE_LS_HOST); // start low-speed host
@ -252,13 +254,13 @@ void UHS_NI MAX3421E_HOST::busprobe() {
regWr(rHIRQ, bmFRAMEIRQ); // see data sheet. regWr(rHIRQ, bmFRAMEIRQ); // see data sheet.
regWr(rMODE, tmpdata); regWr(rMODE, tmpdata);
break; break;
case(bmSE1): //illegal state case bmSE1: // illegal state
// Serial.println("I"); // Serial.println("I");
regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST); regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST);
vbusState = SE1; vbusState = SE1;
// sofevent = false; // sofevent = false;
break; break;
case(bmSE0): //disconnected state case bmSE0: // disconnected state
// Serial.println("D"); // Serial.println("D");
regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST); regWr(rMODE, bmDPPULLDN | bmDMPULLDN | bmHOST);
vbusState = SE0; vbusState = SE0;
@ -396,7 +398,6 @@ again:
regWr(rHIRQ, bmBUSEVENTIRQ); // see data sheet. regWr(rHIRQ, bmBUSEVENTIRQ); // see data sheet.
regWr(rHCTL, bmBUSRST); // issue bus reset to force generate yet another possible IRQ regWr(rHCTL, bmBUSRST); // issue bus reset to force generate yet another possible IRQ
#if USB_HOST_SHIELD_USE_ISR #if USB_HOST_SHIELD_USE_ISR
// Attach ISR to service IRQ from MAX3421e // Attach ISR to service IRQ from MAX3421e
noInterrupts(); noInterrupts();
@ -528,8 +529,7 @@ uint8_t UHS_NI MAX3421E_HOST::InTransfer(UHS_EpInfo *pep, uint16_t nak_limit, ui
/* The transfer is complete under two conditions: */ /* The transfer is complete under two conditions: */
/* 1. The device sent a short packet (L.T. maxPacketSize) */ /* 1. The device sent a short packet (L.T. maxPacketSize) */
/* 2. 'nbytes' have been transferred. */ /* 2. 'nbytes' have been transferred. */
if((pktsize < maxpktsize) || (*nbytesptr >= nbytes)) // have we transferred 'nbytes' bytes? if ((pktsize < maxpktsize) || (*nbytesptr >= nbytes)) { // have we transferred 'nbytes' bytes?
{
// Save toggle value // Save toggle value
pep->bmRcvToggle = ((regRd(rHRSL) & bmRCVTOGRD)) ? 1 : 0; pep->bmRcvToggle = ((regRd(rHRSL) & bmRCVTOGRD)) ? 1 : 0;
//MAX_HOST_DEBUG(PSTR("\r\n")); //MAX_HOST_DEBUG(PSTR("\r\n"));
@ -641,8 +641,7 @@ uint8_t UHS_NI MAX3421E_HOST::dispatchPkt(uint8_t token, uint8_t ep, uint16_t na
for (;;) { for (;;) {
regWr(rHXFR, (token | ep)); // launch the transfer regWr(rHXFR, (token | ep)); // launch the transfer
while((long)(millis() - timeout) < 0L) //wait for transfer completion while (long(millis() - timeout) < 0L) { // wait for transfer completion
{
SYSTEM_OR_SPECIAL_YIELD(); SYSTEM_OR_SPECIAL_YIELD();
tmpdata = regRd(rHIRQ); tmpdata = regRd(rHIRQ);
@ -670,7 +669,7 @@ uint8_t UHS_NI MAX3421E_HOST::dispatchPkt(uint8_t token, uint8_t ep, uint16_t na
break; break;
default: default:
return (rcode); return (rcode);
}//switch( rcode } // switch (rcode)
} }
} }
@ -835,6 +834,7 @@ void UHS_NI MAX3421E_HOST::ISRbottom() {
case UHS_USB_HOST_STATE_CONFIGURING_DONE: case UHS_USB_HOST_STATE_CONFIGURING_DONE:
usb_task_state = UHS_USB_HOST_STATE_RUNNING; usb_task_state = UHS_USB_HOST_STATE_RUNNING;
break; break;
#ifdef USB_HOST_MANUAL_POLL #ifdef USB_HOST_MANUAL_POLL
case UHS_USB_HOST_STATE_RUNNING: case UHS_USB_HOST_STATE_RUNNING:
case UHS_USB_HOST_STATE_ERROR: case UHS_USB_HOST_STATE_ERROR:
@ -878,12 +878,9 @@ void UHS_NI MAX3421E_HOST::ISRbottom() {
/* USB main task. Services the MAX3421e */ /* USB main task. Services the MAX3421e */
#if !USB_HOST_SHIELD_USE_ISR #if !USB_HOST_SHIELD_USE_ISR
void UHS_NI MAX3421E_HOST::ISRTask() {}
void UHS_NI MAX3421E_HOST::ISRTask() {
}
void UHS_NI MAX3421E_HOST::Task() void UHS_NI MAX3421E_HOST::Task()
#else #else
void UHS_NI MAX3421E_HOST::Task() { void UHS_NI MAX3421E_HOST::Task() {
#ifdef USB_HOST_MANUAL_POLL #ifdef USB_HOST_MANUAL_POLL
if (usb_task_state == UHS_USB_HOST_STATE_RUNNING) { if (usb_task_state == UHS_USB_HOST_STATE_RUNNING) {
@ -988,7 +985,7 @@ void UHS_NI MAX3421E_HOST::ISRTask()
#if USB_HOST_SHIELD_USE_ISR #if USB_HOST_SHIELD_USE_ISR
// Enable interrupts // Enable interrupts
interrupts(); interrupts();
#endif /* USB_HOST_SHIELD_USE_ISR */ #endif
ISRbottom(); ISRbottom();
#endif /* SWI_IRQ_NUM */ #endif /* SWI_IRQ_NUM */
} }
@ -998,6 +995,7 @@ void UHS_NI MAX3421E_HOST::ISRTask()
#if 0 #if 0
DDSB(); DDSB();
#endif #endif
#else #else
#error "Never include USB_HOST_SHIELD_INLINE.h, include UHS_host.h instead" #error "Never include USB_HOST_SHIELD_INLINE.h, include UHS_host.h instead"
#endif #endif