🎨 Some automated cleanup
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bdd5f3678e
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@ -51,7 +51,7 @@ enum XPTCoordinate : uint8_t {
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XPT2046_Z2 = 0x40 | XPT2046_CONTROL | XPT2046_DFR_MODE,
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};
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#if !defined(XPT2046_Z1_THRESHOLD)
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#ifndef XPT2046_Z1_THRESHOLD
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#define XPT2046_Z1_THRESHOLD 10
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#endif
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@ -147,7 +147,7 @@ uint32_t TFT_FSMC::ReadID(tft_data_t Reg) {
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}
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bool TFT_FSMC::isBusy() {
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#if defined(STM32F1xx)
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#ifdef STM32F1xx
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volatile bool dmaEnabled = (DMAtx.Instance->CCR & DMA_CCR_EN) != RESET;
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#elif defined(STM32F4xx)
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volatile bool dmaEnabled = DMAtx.Instance->CR & DMA_SxCR_EN;
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@ -179,7 +179,7 @@ uint32_t TFT_SPI::ReadID(uint16_t Reg) {
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}
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bool TFT_SPI::isBusy() {
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#if defined(STM32F1xx)
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#ifdef STM32F1xx
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volatile bool dmaEnabled = (DMAtx.Instance->CCR & DMA_CCR_EN) != RESET;
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#elif defined(STM32F4xx)
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volatile bool dmaEnabled = DMAtx.Instance->CR & DMA_SxCR_EN;
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@ -21,7 +21,7 @@
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*/
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#pragma once
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#if !defined(__has_include)
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#ifndef __has_include
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#define __has_include(...) 1
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#endif
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@ -2276,7 +2276,7 @@ static_assert(Y_MAX_LENGTH >= Y_BED_SIZE, "Movement bounds (Y_MIN_POS, Y_MAX_POS
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* Redundant temperature sensor config
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*/
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#if HAS_TEMP_REDUNDANT
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#if !defined(TEMP_SENSOR_REDUNDANT_SOURCE)
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#ifndef TEMP_SENSOR_REDUNDANT_SOURCE
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#error "TEMP_SENSOR_REDUNDANT requires TEMP_SENSOR_REDUNDANT_SOURCE."
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#elif !defined(TEMP_SENSOR_REDUNDANT_TARGET)
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#error "TEMP_SENSOR_REDUNDANT requires TEMP_SENSOR_REDUNDANT_TARGET."
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@ -2984,7 +2984,7 @@ static_assert(Y_MAX_LENGTH >= Y_BED_SIZE, "Movement bounds (Y_MIN_POS, Y_MAX_POS
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#endif
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#if ENABLED(ANYCUBIC_LCD_CHIRON)
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#if !defined(BEEPER_PIN)
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#ifndef BEEPER_PIN
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#error "ANYCUBIC_LCD_CHIRON requires BEEPER_PIN"
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#elif DISABLED(SDSUPPORT)
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#error "ANYCUBIC_LCD_CHIRON requires SDSUPPORT"
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@ -97,7 +97,7 @@
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#elif defined(TOUCH_UI_800x480)
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namespace FTDI {
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#if defined(TOUCH_UI_800x480_GENERIC)
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#ifdef TOUCH_UI_800x480_GENERIC
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constexpr uint8_t Pclk = 2;
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constexpr uint16_t Hsize = 800;
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constexpr uint16_t Vsize = 480;
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@ -413,7 +413,7 @@ void init( void )
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// Disable pull-up on every pin
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for (unsigned i = 0; i < PINS_COUNT; i++)
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digitalWrite(i, LOW);
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digitalWrite(i, LOW);
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// Enable parallel access on PIO output data registers
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PIOA->PIO_OWER = 0xFFFFFFFF;
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@ -100,11 +100,11 @@ extern "C" {
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* This value is used by the RCC HAL module to compute the system frequency
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* (when HSE is used as system clock source, directly or through the PLL).
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*/
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#if !defined (HSE_VALUE)
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#ifndef HSE_VALUE
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#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
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#endif /* HSE_VALUE */
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#if !defined (HSE_STARTUP_TIMEOUT)
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#ifndef HSE_STARTUP_TIMEOUT
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#define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */
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#endif /* HSE_STARTUP_TIMEOUT */
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@ -112,7 +112,7 @@ extern "C" {
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* @brief Internal oscillator (CSI) default value.
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* This value is the default CSI value after Reset.
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*/
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#if !defined (CSI_VALUE)
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#ifndef CSI_VALUE
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#define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
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#endif /* CSI_VALUE */
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@ -121,7 +121,7 @@ extern "C" {
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* This value is used by the RCC HAL module to compute the system frequency
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* (when HSI is used as system clock source, directly or through the PLL).
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*/
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#if !defined (HSI_VALUE)
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#ifndef HSI_VALUE
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#define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/
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#endif /* HSI_VALUE */
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@ -129,16 +129,16 @@ extern "C" {
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* @brief External Low Speed oscillator (LSE) value.
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* This value is used by the UART, RTC HAL module to compute the system frequency
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*/
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#if !defined (LSE_VALUE)
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#ifndef LSE_VALUE
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#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
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#endif /* LSE_VALUE */
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#if !defined (LSE_STARTUP_TIMEOUT)
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#ifndef LSE_STARTUP_TIMEOUT
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#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
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#endif /* LSE_STARTUP_TIMEOUT */
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#if !defined (LSI_VALUE)
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#ifndef LSI_VALUE
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#define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/
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#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
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The real value may vary depending on the variations
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@ -148,7 +148,7 @@ in voltage and temperature.*/
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* This value is used by the I2S HAL module to compute the I2S clock source
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* frequency, this source is inserted directly through I2S_CKIN pad.
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*/
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#if !defined (EXTERNAL_CLOCK_VALUE)
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#ifndef EXTERNAL_CLOCK_VALUE
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#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External clock in Hz*/
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#endif /* EXTERNAL_CLOCK_VALUE */
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@ -184,7 +184,7 @@ void SystemClockStartupInit() {
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PWR->CR3 &= ~(1 << 2); // SCUEN=0
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PWR->D3CR |= 3 << 14; // VOS=3,Scale1,1.15~1.26V core voltage
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while((PWR->D3CR & (1 << 13)) == 0); // Wait for the voltage to stabilize
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while((PWR->D3CR & (1 << 13)) == 0); // Wait for the voltage to stabilize
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RCC->CR |= 1<<16; // Enable HSE
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uint16_t timeout = 0;
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@ -198,9 +198,9 @@ void SystemClockStartupInit() {
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RCC->PLLCKSELR |= 2 << 0; // PLLSRC[1:0] = 2, HSE for PLL clock source
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RCC->PLLCKSELR |= 5 << 4; // DIVM1[5:0] = pllm, Prescaler for PLL1
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RCC->PLL1DIVR |= (160 - 1) << 0; // DIVN1[8:0] = plln - 1, Multiplication factor for PLL1 VCO
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RCC->PLL1DIVR |= (2 - 1) << 9; // DIVP1[6:0] = pllp - 1, PLL1 DIVP division factor
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RCC->PLL1DIVR |= (2 - 1) << 9; // DIVP1[6:0] = pllp - 1, PLL1 DIVP division factor
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RCC->PLL1DIVR |= (4 - 1) << 16; // DIVQ1[6:0] = pllq - 1, PLL1 DIVQ division factor
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RCC->PLL1DIVR |= 1 << 24; // DIVR1[6:0] = pllr - 1, PLL1 DIVR division factor
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RCC->PLL1DIVR |= 1 << 24; // DIVR1[6:0] = pllr - 1, PLL1 DIVR division factor
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RCC->PLLCFGR |= 2 << 2; // PLL1 input (ref1_ck) clock range frequency is between 4 and 8 MHz
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RCC->PLLCFGR |= 0 << 1; // PLL1 VCO selection, 0: 192 to 836 MHz, 1 : 150 to 420 MHz
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RCC->PLLCFGR |= 3 << 16; // pll1_q_ck and pll1_p_ck output is enabled
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@ -209,7 +209,7 @@ void SystemClockStartupInit() {
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// PLL2 DIVR clock frequency = 220MHz, so that SDRAM clock can be set to 110MHz
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RCC->PLLCKSELR |= 25 << 12; // DIVM2[5:0] = 25, Prescaler for PLL2
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RCC->PLL2DIVR |= (440 - 1) << 0; // DIVN2[8:0] = 440 - 1, Multiplication factor for PLL2 VCO
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RCC->PLL2DIVR |= (440 - 1) << 0; // DIVN2[8:0] = 440 - 1, Multiplication factor for PLL2 VCO
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RCC->PLL2DIVR |= (2 - 1) << 9; // DIVP2[6:0] = 2-1, PLL2 DIVP division factor
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RCC->PLL2DIVR |= (2 - 1) << 24; // DIVR2[6:0] = 2-1, PLL2 DIVR division factor
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RCC->PLLCFGR |= 0 << 6; // PLL2RGE[1:0]=0, PLL2 input (ref2_ck) clock range frequency is between 1 and 2 MHz
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@ -271,8 +271,8 @@ uint8_t MPU_Set_Protection(uint32_t baseaddr, uint32_t size, uint32_t rnum, uint
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uint8_t rnr = 0;
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if ((size % 32) || size == 0) return 1;
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rnr = MPU_Convert_Bytes_To_POT(size) - 1;
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SCB->SHCSR &= ~(1 << 16); //disable MemManage
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MPU->CTRL &= ~(1 << 0); //disable MPU
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SCB->SHCSR &= ~(1 << 16); //disable MemManage
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MPU->CTRL &= ~(1 << 0); //disable MPU
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MPU->RNR = rnum;
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MPU->RBAR = baseaddr;
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tempreg |= 0 << 28;
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@ -286,21 +286,21 @@ uint8_t MPU_Set_Protection(uint32_t baseaddr, uint32_t size, uint32_t rnum, uint
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tempreg |= 1 << 0;
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MPU->RASR = tempreg;
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MPU->CTRL = (1 << 2) | (1 << 0); //enable PRIVDEFENA
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SCB->SHCSR |= 1 << 16; //enable MemManage
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SCB->SHCSR |= 1 << 16; //enable MemManage
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return 0;
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}
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void MPU_Memory_Protection(void)
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{
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MPU_Set_Protection(0x20000000, 128 * 1024, 1, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect DTCM 128k, Sharing is prohibited, cache is allowed, and buffering is allowed
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MPU_Set_Protection(0x20000000, 128 * 1024, 1, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect DTCM 128k, Sharing is prohibited, cache is allowed, and buffering is allowed
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MPU_Set_Protection(0x24000000, 512 * 1024, 2, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect AXI SRAM, Sharing is prohibited, cache is allowed, and buffering is allowed
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MPU_Set_Protection(0x30000000, 512 * 1024, 3, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SRAM1~SRAM3, Sharing is prohibited, cache is allowed, and buffering is allowed
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MPU_Set_Protection(0x38000000, 64 * 1024, 4, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SRAM4, Sharing is prohibited, cache is allowed, and buffering is allowed
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MPU_Set_Protection(0x24000000, 512 * 1024, 2, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect AXI SRAM, Sharing is prohibited, cache is allowed, and buffering is allowed
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MPU_Set_Protection(0x30000000, 512 * 1024, 3, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SRAM1~SRAM3, Sharing is prohibited, cache is allowed, and buffering is allowed
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MPU_Set_Protection(0x38000000, 64 * 1024, 4, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SRAM4, Sharing is prohibited, cache is allowed, and buffering is allowed
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MPU_Set_Protection(0x60000000, 64 * 1024 * 1024, 5, MPU_REGION_FULL_ACCESS, 0, 0, 0); // protect LCD FMC 64M, No sharing, no cache, no buffering
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MPU_Set_Protection(0XC0000000, 32 * 1024 * 1024, 6, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SDRAM 32M, Sharing is prohibited, cache is allowed, and buffering is allowed
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MPU_Set_Protection(0X80000000, 256 * 1024 * 1024, 7, MPU_REGION_FULL_ACCESS, 0, 0, 0); // protect NAND FLASH 256M, No sharing, no cache, no buffering
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MPU_Set_Protection(0x60000000, 64 * 1024 * 1024, 5, MPU_REGION_FULL_ACCESS, 0, 0, 0); // protect LCD FMC 64M, No sharing, no cache, no buffering
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MPU_Set_Protection(0XC0000000, 32 * 1024 * 1024, 6, MPU_REGION_FULL_ACCESS, 0, 1, 1); // protect SDRAM 32M, Sharing is prohibited, cache is allowed, and buffering is allowed
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MPU_Set_Protection(0X80000000, 256 * 1024 * 1024, 7, MPU_REGION_FULL_ACCESS, 0, 0, 0); // protect NAND FLASH 256M, No sharing, no cache, no buffering
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}
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/**
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@ -136,7 +136,7 @@ WEAK const PinMap PinMap_PWM[] = {
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#endif
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{PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM2_CH3
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// {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_1, 3, 0)}, // TIM2_CH3
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#if defined(STM32F103xG)
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#ifdef STM32F103xG
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// {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM5_CH3
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#endif
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#if defined(STM32F103xE) || defined(STM32F103xG)
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@ -148,11 +148,11 @@ WEAK const PinMap PinMap_PWM[] = {
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#else
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{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4
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#endif
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#if defined(STM32F103xG)
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#ifdef STM32F103xG
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// {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2
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#endif
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{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1
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#if defined(STM32F103xG)
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#ifdef STM32F103xG
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// {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1
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#endif
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// {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2
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@ -161,7 +161,7 @@ WEAK const PinMap PinMap_PWM[] = {
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#else
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{PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
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#endif
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#if defined(STM32F103xG)
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#ifdef STM32F103xG
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// {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1
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#endif
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{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1
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@ -196,10 +196,10 @@ WEAK const PinMap PinMap_PWM[] = {
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{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3
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{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4
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#endif
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#if defined(STM32F103xG)
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#ifdef STM32F103xG
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// {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1
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#endif
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#if defined(STM32F103xG)
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#ifdef STM32F103xG
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// {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1
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#endif
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{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
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@ -208,11 +208,11 @@ WEAK const PinMap PinMap_PWM[] = {
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// {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
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{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N
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{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N
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#if defined(STM32F103xG)
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#ifdef STM32F103xG
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// {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1
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#endif
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{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N
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#if defined(STM32F103xG)
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#ifdef STM32F103xG
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// {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2
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#endif
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{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1
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@ -249,7 +249,7 @@ WEAK const PinMap PinMap_UART_TX[] = {
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#if defined(STM32F103xE) || defined(STM32F103xG)
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{PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE)},
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#endif
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#if defined(STM32F103xB)
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#ifdef STM32F103xB
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{PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
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#endif
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#if defined(STM32F103xE) || defined(STM32F103xG)
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@ -270,7 +270,7 @@ WEAK const PinMap PinMap_UART_RX[] = {
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#if defined(STM32F103xE) || defined(STM32F103xG)
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{PC_11, UART4, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_NONE)},
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#endif
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#if defined(STM32F103xB)
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#ifdef STM32F103xB
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{PC_11, USART3, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLUP, AFIO_USART3_PARTIAL)},
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#endif
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#if defined(STM32F103xE) || defined(STM32F103xG)
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@ -171,7 +171,7 @@ extern "C" {
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* Activated: CRC code is present inside driver
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* Deactivated: CRC code cleaned from driver
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*/
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#if !defined(USE_SPI_CRC)
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#ifndef USE_SPI_CRC
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#define USE_SPI_CRC 0
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#endif
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#define PIN_SERIAL2_TX PA2
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// Extra HAL modules
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#if defined(STM32F103xE)
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#ifdef STM32F103xE
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//#define HAL_DAC_MODULE_ENABLED (unused or maybe for the eeprom write?)
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#define HAL_SD_MODULE_ENABLED
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#define HAL_SRAM_MODULE_ENABLED
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#else
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{PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM2_CH4
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#endif
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#if defined(STM32F103xG)
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#ifdef STM32F103xG
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//{PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM9_CH2
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#endif
|
||||
{PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM3_CH1
|
||||
#if defined(STM32F103xG)
|
||||
#ifdef STM32F103xG
|
||||
//{PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM13_CH1
|
||||
#endif
|
||||
{PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM1_PARTIAL, 1, 1)}, // TIM1_CH1N
|
||||
//{PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM3_CH2
|
||||
//{PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM8_CH1N
|
||||
#if defined(STM32F103xG)
|
||||
#ifdef STM32F103xG
|
||||
//{PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM14_CH1
|
||||
#endif
|
||||
{PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM1_CH1
|
||||
@ -185,11 +185,11 @@ WEAK const PinMap PinMap_PWM[] = {
|
||||
{PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM4_CH1
|
||||
{PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM4_CH2
|
||||
{PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 0)}, // TIM4_CH3
|
||||
#if defined(STM32F103xG)
|
||||
#ifdef STM32F103xG
|
||||
//{PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM10_CH1
|
||||
#endif
|
||||
{PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 4, 0)}, // TIM4_CH4
|
||||
#if defined(STM32F103xG)
|
||||
#ifdef STM32F103xG
|
||||
//{PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM11_CH1
|
||||
#endif
|
||||
{PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_PARTIAL_2, 3, 0)}, // TIM2_CH3
|
||||
@ -198,11 +198,11 @@ WEAK const PinMap PinMap_PWM[] = {
|
||||
//{PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM2_ENABLE, 4, 0)}, // TIM2_CH4
|
||||
{PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 1)}, // TIM1_CH1N
|
||||
{PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 1)}, // TIM1_CH2N
|
||||
#if defined(STM32F103xG)
|
||||
#ifdef STM32F103xG
|
||||
//{PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 1, 0)}, // TIM12_CH1
|
||||
#endif
|
||||
{PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 3, 1)}, // TIM1_CH3N
|
||||
#if defined(STM32F103xG)
|
||||
#ifdef STM32F103xG
|
||||
//{PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_NONE, 2, 0)}, // TIM12_CH2
|
||||
#endif
|
||||
{PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM3_ENABLE, 1, 0)}, // TIM3_CH1
|
||||
@ -223,7 +223,7 @@ WEAK const PinMap PinMap_PWM[] = {
|
||||
{PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 2, 0)}, // TIM4_CH2
|
||||
{PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 3, 0)}, // TIM4_CH3
|
||||
{PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM4_ENABLE, 4, 0)}, // TIM4_CH4
|
||||
#if defined(STM32F103xG)
|
||||
#ifdef STM32F103xG
|
||||
{PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 1, 0)}, // TIM9_CH1
|
||||
{PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, AFIO_TIM9_ENABLE, 2, 0)}, // TIM9_CH2
|
||||
#endif
|
||||
|
@ -81,15 +81,15 @@ extern "C" {
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#if defined(USE_STM3210C_EVAL)
|
||||
#ifndef HSE_VALUE
|
||||
#ifdef USE_STM3210C_EVAL
|
||||
#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */
|
||||
#else
|
||||
#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#ifndef HSE_STARTUP_TIMEOUT
|
||||
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
@ -98,14 +98,14 @@ extern "C" {
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#ifndef HSI_VALUE
|
||||
#define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz */
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#ifndef LSI_VALUE
|
||||
#define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
@ -114,11 +114,11 @@ extern "C" {
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#ifndef LSE_VALUE
|
||||
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#ifndef LSE_STARTUP_TIMEOUT
|
||||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
@ -129,7 +129,7 @@ extern "C" {
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#if !defined(VDD_VALUE)
|
||||
#ifndef VDD_VALUE
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
#endif
|
||||
#if !defined (TICK_INT_PRIORITY)
|
||||
|
@ -91,11 +91,11 @@
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#ifndef HSE_VALUE
|
||||
#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#ifndef HSE_STARTUP_TIMEOUT
|
||||
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
@ -104,14 +104,14 @@
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#ifndef HSI_VALUE
|
||||
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#ifndef LSI_VALUE
|
||||
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
@ -119,11 +119,11 @@
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#ifndef LSE_VALUE
|
||||
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#ifndef LSE_STARTUP_TIMEOUT
|
||||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
@ -132,7 +132,7 @@
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#ifndef EXTERNAL_CLOCK_VALUE
|
||||
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
|
@ -15,7 +15,7 @@
|
||||
* STM32G0C1R(C-E)IxN.xml, STM32G0C1R(C-E)TxN.xml
|
||||
* CubeMX DB release 6.0.30
|
||||
*/
|
||||
#if !defined(CUSTOM_PERIPHERAL_PINS)
|
||||
#ifndef CUSTOM_PERIPHERAL_PINS
|
||||
#include "Arduino.h"
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
|
@ -11,7 +11,7 @@
|
||||
*******************************************************************************
|
||||
*/
|
||||
|
||||
#if defined(STM32G0B1xx)
|
||||
#ifdef STM32G0B1xx
|
||||
#include "pins_arduino.h"
|
||||
|
||||
// Digital PinName array
|
||||
|
@ -17,7 +17,7 @@
|
||||
* STM32H753VIHx.xml, STM32H753VITx.xml
|
||||
* CubeMX DB release 6.0.30
|
||||
*/
|
||||
#if !defined(CUSTOM_PERIPHERAL_PINS)
|
||||
#ifndef CUSTOM_PERIPHERAL_PINS
|
||||
#include "Arduino.h"
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
|
@ -10,7 +10,7 @@
|
||||
*
|
||||
*******************************************************************************
|
||||
*/
|
||||
#if defined(STM32H743xx)
|
||||
#ifdef STM32H743xx
|
||||
#include "pins_arduino.h"
|
||||
|
||||
// Digital PinName array
|
||||
|
@ -226,16 +226,16 @@
|
||||
#endif
|
||||
|
||||
// Extra HAL modules
|
||||
#if !defined(HAL_DAC_MODULE_DISABLED)
|
||||
#ifndef HAL_DAC_MODULE_DISABLED
|
||||
#define HAL_DAC_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_ETH_MODULE_DISABLED)
|
||||
#ifndef HAL_ETH_MODULE_DISABLED
|
||||
#define HAL_ETH_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_QSPI_MODULE_DISABLED)
|
||||
#ifndef HAL_QSPI_MODULE_DISABLED
|
||||
#define HAL_QSPI_MODULE_ENABLED
|
||||
#endif
|
||||
#if !defined(HAL_SD_MODULE_DISABLED)
|
||||
#ifndef HAL_SD_MODULE_DISABLED
|
||||
#define HAL_SD_MODULE_ENABLED
|
||||
#endif
|
||||
|
||||
|
@ -91,11 +91,11 @@
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#ifndef HSE_VALUE
|
||||
#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#ifndef HSE_STARTUP_TIMEOUT
|
||||
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
@ -104,14 +104,14 @@
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#ifndef HSI_VALUE
|
||||
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#ifndef LSI_VALUE
|
||||
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
@ -119,11 +119,11 @@
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#ifndef LSE_VALUE
|
||||
#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#ifndef LSE_STARTUP_TIMEOUT
|
||||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
@ -132,7 +132,7 @@
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#ifndef EXTERNAL_CLOCK_VALUE
|
||||
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
|
@ -131,74 +131,74 @@ extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
|
||||
{&gpioc, NULL, NULL, 14, 0, ADCx}, /* PC14 OSC32_IN */
|
||||
{&gpioc, NULL, NULL, 15, 0, ADCx}, /* PC15 OSC32_OUT */
|
||||
|
||||
{&gpiod, NULL, NULL, 0, 0, ADCx} , /* PD0 OSC_IN */
|
||||
{&gpiod, NULL, NULL, 1, 0, ADCx} , /* PD1 OSC_OUT */
|
||||
{&gpiod, NULL, NULL, 2, 0, ADCx} , /* PD2 TIM3_ETR/UART5_RX SDIO_CMD */
|
||||
{&gpiod, NULL, NULL, 0, 0, ADCx} , /* PD0 OSC_IN */
|
||||
{&gpiod, NULL, NULL, 1, 0, ADCx} , /* PD1 OSC_OUT */
|
||||
{&gpiod, NULL, NULL, 2, 0, ADCx} , /* PD2 TIM3_ETR/UART5_RX SDIO_CMD */
|
||||
|
||||
{&gpiod, NULL, NULL, 3, 0, ADCx} , /* PD3 FSMC_CLK */
|
||||
{&gpiod, NULL, NULL, 4, 0, ADCx} , /* PD4 FSMC_NOE */
|
||||
{&gpiod, NULL, NULL, 5, 0, ADCx} , /* PD5 FSMC_NWE */
|
||||
{&gpiod, NULL, NULL, 6, 0, ADCx} , /* PD6 FSMC_NWAIT */
|
||||
{&gpiod, NULL, NULL, 7, 0, ADCx} , /* PD7 FSMC_NE1/FSMC_NCE2 */
|
||||
{&gpiod, NULL, NULL, 8, 0, ADCx} , /* PD8 FSMC_D13 */
|
||||
{&gpiod, NULL, NULL, 9, 0, ADCx} , /* PD9 FSMC_D14 */
|
||||
{&gpiod, NULL, NULL, 10, 0, ADCx} , /* PD10 FSMC_D15 */
|
||||
{&gpiod, NULL, NULL, 11, 0, ADCx} , /* PD11 FSMC_A16 */
|
||||
{&gpiod, NULL, NULL, 12, 0, ADCx} , /* PD12 FSMC_A17 */
|
||||
{&gpiod, NULL, NULL, 13, 0, ADCx} , /* PD13 FSMC_A18 */
|
||||
{&gpiod, NULL, NULL, 14, 0, ADCx} , /* PD14 FSMC_D0 */
|
||||
{&gpiod, NULL, NULL, 15, 0, ADCx} , /* PD15 FSMC_D1 */
|
||||
{&gpiod, NULL, NULL, 3, 0, ADCx} , /* PD3 FSMC_CLK */
|
||||
{&gpiod, NULL, NULL, 4, 0, ADCx} , /* PD4 FSMC_NOE */
|
||||
{&gpiod, NULL, NULL, 5, 0, ADCx} , /* PD5 FSMC_NWE */
|
||||
{&gpiod, NULL, NULL, 6, 0, ADCx} , /* PD6 FSMC_NWAIT */
|
||||
{&gpiod, NULL, NULL, 7, 0, ADCx} , /* PD7 FSMC_NE1/FSMC_NCE2 */
|
||||
{&gpiod, NULL, NULL, 8, 0, ADCx} , /* PD8 FSMC_D13 */
|
||||
{&gpiod, NULL, NULL, 9, 0, ADCx} , /* PD9 FSMC_D14 */
|
||||
{&gpiod, NULL, NULL, 10, 0, ADCx} , /* PD10 FSMC_D15 */
|
||||
{&gpiod, NULL, NULL, 11, 0, ADCx} , /* PD11 FSMC_A16 */
|
||||
{&gpiod, NULL, NULL, 12, 0, ADCx} , /* PD12 FSMC_A17 */
|
||||
{&gpiod, NULL, NULL, 13, 0, ADCx} , /* PD13 FSMC_A18 */
|
||||
{&gpiod, NULL, NULL, 14, 0, ADCx} , /* PD14 FSMC_D0 */
|
||||
{&gpiod, NULL, NULL, 15, 0, ADCx} , /* PD15 FSMC_D1 */
|
||||
|
||||
{&gpioe, NULL, NULL, 0, 0, ADCx} , /* PE0 */
|
||||
{&gpioe, NULL, NULL, 1, 0, ADCx} , /* PE1 */
|
||||
{&gpioe, NULL, NULL, 2, 0, ADCx} , /* PE2 */
|
||||
{&gpioe, NULL, NULL, 3, 0, ADCx} , /* PE3 */
|
||||
{&gpioe, NULL, NULL, 4, 0, ADCx} , /* PE4 */
|
||||
{&gpioe, NULL, NULL, 5, 0, ADCx} , /* PE5 */
|
||||
{&gpioe, NULL, NULL, 6, 0, ADCx} , /* PE6 */
|
||||
{&gpioe, NULL, NULL, 7, 0, ADCx} , /* PE7 */
|
||||
{&gpioe, NULL, NULL, 8, 0, ADCx} , /* PE8 */
|
||||
{&gpioe, NULL, NULL, 9, 0, ADCx} , /* PE9 */
|
||||
{&gpioe, NULL, NULL, 10, 0, ADCx} , /* PE10 */
|
||||
{&gpioe, NULL, NULL, 11, 0, ADCx} , /* PE11 */
|
||||
{&gpioe, NULL, NULL, 12, 0, ADCx} , /* PE12 */
|
||||
{&gpioe, NULL, NULL, 13, 0, ADCx} , /* PE13 */
|
||||
{&gpioe, NULL, NULL, 14, 0, ADCx} , /* PE14 */
|
||||
{&gpioe, NULL, NULL, 15, 0, ADCx} , /* PE15 */
|
||||
{&gpioe, NULL, NULL, 0, 0, ADCx} , /* PE0 */
|
||||
{&gpioe, NULL, NULL, 1, 0, ADCx} , /* PE1 */
|
||||
{&gpioe, NULL, NULL, 2, 0, ADCx} , /* PE2 */
|
||||
{&gpioe, NULL, NULL, 3, 0, ADCx} , /* PE3 */
|
||||
{&gpioe, NULL, NULL, 4, 0, ADCx} , /* PE4 */
|
||||
{&gpioe, NULL, NULL, 5, 0, ADCx} , /* PE5 */
|
||||
{&gpioe, NULL, NULL, 6, 0, ADCx} , /* PE6 */
|
||||
{&gpioe, NULL, NULL, 7, 0, ADCx} , /* PE7 */
|
||||
{&gpioe, NULL, NULL, 8, 0, ADCx} , /* PE8 */
|
||||
{&gpioe, NULL, NULL, 9, 0, ADCx} , /* PE9 */
|
||||
{&gpioe, NULL, NULL, 10, 0, ADCx} , /* PE10 */
|
||||
{&gpioe, NULL, NULL, 11, 0, ADCx} , /* PE11 */
|
||||
{&gpioe, NULL, NULL, 12, 0, ADCx} , /* PE12 */
|
||||
{&gpioe, NULL, NULL, 13, 0, ADCx} , /* PE13 */
|
||||
{&gpioe, NULL, NULL, 14, 0, ADCx} , /* PE14 */
|
||||
{&gpioe, NULL, NULL, 15, 0, ADCx} , /* PE15 */
|
||||
|
||||
{&gpiof, NULL, NULL, 0, 0, ADCx} , /* PF0 */
|
||||
{&gpiof, NULL, NULL, 1, 0, ADCx} , /* PF1 */
|
||||
{&gpiof, NULL, NULL, 2, 0, ADCx} , /* PF2 */
|
||||
{&gpiof, NULL, NULL, 3, 0, ADCx} , /* PF3 */
|
||||
{&gpiof, NULL, NULL, 4, 0, ADCx} , /* PF4 */
|
||||
{&gpiof, NULL, NULL, 5, 0, ADCx} , /* PF5 */
|
||||
{&gpiof, NULL, NULL, 6, 0, ADCx} , /* PF6 */
|
||||
{&gpiof, NULL, NULL, 7, 0, ADCx} , /* PF7 */
|
||||
{&gpiof, NULL, NULL, 8, 0, ADCx} , /* PF8 */
|
||||
{&gpiof, NULL, NULL, 9, 0, ADCx} , /* PF9 */
|
||||
{&gpiof, NULL, NULL, 10, 0, ADCx} , /* PF10 */
|
||||
{&gpiof, NULL, NULL, 11, 0, ADCx} , /* PF11 */
|
||||
{&gpiof, NULL, NULL, 12, 0, ADCx} , /* PF12 */
|
||||
{&gpiof, NULL, NULL, 13, 0, ADCx} , /* PF13 */
|
||||
{&gpiof, NULL, NULL, 14, 0, ADCx} , /* PF14 */
|
||||
{&gpiof, NULL, NULL, 15, 0, ADCx} , /* PF15 */
|
||||
{&gpiof, NULL, NULL, 0, 0, ADCx} , /* PF0 */
|
||||
{&gpiof, NULL, NULL, 1, 0, ADCx} , /* PF1 */
|
||||
{&gpiof, NULL, NULL, 2, 0, ADCx} , /* PF2 */
|
||||
{&gpiof, NULL, NULL, 3, 0, ADCx} , /* PF3 */
|
||||
{&gpiof, NULL, NULL, 4, 0, ADCx} , /* PF4 */
|
||||
{&gpiof, NULL, NULL, 5, 0, ADCx} , /* PF5 */
|
||||
{&gpiof, NULL, NULL, 6, 0, ADCx} , /* PF6 */
|
||||
{&gpiof, NULL, NULL, 7, 0, ADCx} , /* PF7 */
|
||||
{&gpiof, NULL, NULL, 8, 0, ADCx} , /* PF8 */
|
||||
{&gpiof, NULL, NULL, 9, 0, ADCx} , /* PF9 */
|
||||
{&gpiof, NULL, NULL, 10, 0, ADCx} , /* PF10 */
|
||||
{&gpiof, NULL, NULL, 11, 0, ADCx} , /* PF11 */
|
||||
{&gpiof, NULL, NULL, 12, 0, ADCx} , /* PF12 */
|
||||
{&gpiof, NULL, NULL, 13, 0, ADCx} , /* PF13 */
|
||||
{&gpiof, NULL, NULL, 14, 0, ADCx} , /* PF14 */
|
||||
{&gpiof, NULL, NULL, 15, 0, ADCx} , /* PF15 */
|
||||
|
||||
{&gpiog, NULL, NULL, 0, 0, ADCx} , /* PG0 */
|
||||
{&gpiog, NULL, NULL, 1, 0, ADCx} , /* PG1 */
|
||||
{&gpiog, NULL, NULL, 2, 0, ADCx} , /* PG2 */
|
||||
{&gpiog, NULL, NULL, 3, 0, ADCx} , /* PG3 */
|
||||
{&gpiog, NULL, NULL, 4, 0, ADCx} , /* PG4 */
|
||||
{&gpiog, NULL, NULL, 5, 0, ADCx} , /* PG5 */
|
||||
{&gpiog, NULL, NULL, 6, 0, ADCx} , /* PG6 */
|
||||
{&gpiog, NULL, NULL, 7, 0, ADCx} , /* PG7 */
|
||||
{&gpiog, NULL, NULL, 8, 0, ADCx} , /* PG8 */
|
||||
{&gpiog, NULL, NULL, 9, 0, ADCx} , /* PG9 */
|
||||
{&gpiog, NULL, NULL, 10, 0, ADCx} , /* PG10 */
|
||||
{&gpiog, NULL, NULL, 11, 0, ADCx} , /* PG11 */
|
||||
{&gpiog, NULL, NULL, 12, 0, ADCx} , /* PG12 */
|
||||
{&gpiog, NULL, NULL, 13, 0, ADCx} , /* PG13 */
|
||||
{&gpiog, NULL, NULL, 14, 0, ADCx} , /* PG14 */
|
||||
{&gpiog, NULL, NULL, 15, 0, ADCx} /* PG15 */
|
||||
{&gpiog, NULL, NULL, 0, 0, ADCx} , /* PG0 */
|
||||
{&gpiog, NULL, NULL, 1, 0, ADCx} , /* PG1 */
|
||||
{&gpiog, NULL, NULL, 2, 0, ADCx} , /* PG2 */
|
||||
{&gpiog, NULL, NULL, 3, 0, ADCx} , /* PG3 */
|
||||
{&gpiog, NULL, NULL, 4, 0, ADCx} , /* PG4 */
|
||||
{&gpiog, NULL, NULL, 5, 0, ADCx} , /* PG5 */
|
||||
{&gpiog, NULL, NULL, 6, 0, ADCx} , /* PG6 */
|
||||
{&gpiog, NULL, NULL, 7, 0, ADCx} , /* PG7 */
|
||||
{&gpiog, NULL, NULL, 8, 0, ADCx} , /* PG8 */
|
||||
{&gpiog, NULL, NULL, 9, 0, ADCx} , /* PG9 */
|
||||
{&gpiog, NULL, NULL, 10, 0, ADCx} , /* PG10 */
|
||||
{&gpiog, NULL, NULL, 11, 0, ADCx} , /* PG11 */
|
||||
{&gpiog, NULL, NULL, 12, 0, ADCx} , /* PG12 */
|
||||
{&gpiog, NULL, NULL, 13, 0, ADCx} , /* PG13 */
|
||||
{&gpiog, NULL, NULL, 14, 0, ADCx} , /* PG14 */
|
||||
{&gpiog, NULL, NULL, 15, 0, ADCx} /* PG15 */
|
||||
};
|
||||
|
||||
/* Basically everything that is defined as having a timer us PWM */
|
||||
@ -219,15 +219,15 @@ extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = {
|
||||
|
||||
|
||||
#ifdef SERIAL_USB
|
||||
DEFINE_HWSERIAL(Serial1, 1);
|
||||
DEFINE_HWSERIAL(Serial2, 2);
|
||||
DEFINE_HWSERIAL(Serial3, 3);
|
||||
DEFINE_HWSERIAL_UART(Serial4, 4);
|
||||
DEFINE_HWSERIAL_UART(Serial5, 5);
|
||||
DEFINE_HWSERIAL(Serial1, 1);
|
||||
DEFINE_HWSERIAL(Serial2, 2);
|
||||
DEFINE_HWSERIAL(Serial3, 3);
|
||||
DEFINE_HWSERIAL_UART(Serial4, 4);
|
||||
DEFINE_HWSERIAL_UART(Serial5, 5);
|
||||
#else
|
||||
DEFINE_HWSERIAL(Serial, 1);
|
||||
DEFINE_HWSERIAL(Serial1, 2);
|
||||
DEFINE_HWSERIAL(Serial2, 3);
|
||||
DEFINE_HWSERIAL_UART(Serial3, 4);
|
||||
DEFINE_HWSERIAL_UART(Serial4, 5);
|
||||
DEFINE_HWSERIAL(Serial, 1);
|
||||
DEFINE_HWSERIAL(Serial1, 2);
|
||||
DEFINE_HWSERIAL(Serial2, 3);
|
||||
DEFINE_HWSERIAL_UART(Serial3, 4);
|
||||
DEFINE_HWSERIAL_UART(Serial4, 5);
|
||||
#endif
|
||||
|
@ -144,10 +144,10 @@ static void setup_clocks(void) {
|
||||
* present. If no bootloader is present, the user NVIC usually starts
|
||||
* at the Flash base address, 0x08000000.
|
||||
*/
|
||||
#if defined(BOOTLOADER_maple)
|
||||
#define USER_ADDR_ROM 0x08005000
|
||||
#ifdef BOOTLOADER_maple
|
||||
#define USER_ADDR_ROM 0x08005000
|
||||
#else
|
||||
#define USER_ADDR_ROM 0x08000000
|
||||
#define USER_ADDR_ROM 0x08000000
|
||||
#endif
|
||||
#define USER_ADDR_RAM 0x20000C00
|
||||
extern char __text_start__;
|
||||
|
@ -144,7 +144,7 @@ static void setup_clocks(void) {
|
||||
* present. If no bootloader is present, the user NVIC usually starts
|
||||
* at the Flash base address, 0x08000000.
|
||||
*/
|
||||
#if defined(BOOTLOADER_maple)
|
||||
#ifdef BOOTLOADER_maple
|
||||
#define USER_ADDR_ROM 0x08002000
|
||||
#else
|
||||
#define USER_ADDR_ROM 0x08000000
|
||||
|
Loading…
Reference in New Issue
Block a user