MPCNC/Firmware2
1
0
Fork 0
Code Issues 1 Pull Requests Releases Wiki Activity

🐛 Fix FYSETC Cheetah v2.0 build (#22926)

Browse Source
This commit is contained in:
George Fu 2021-10-13 09:32:54 +08:00 committed by Scott Lahteine
parent adf7072fa8
commit 995230f597
3 changed files with 3 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
buildroot/share/PlatformIO/boards/marlin_FYSETC_CHEETAH_V20.json
View File

@ -14,7 +14,6 @@
"0x3748" "0x3748"
] ]
], ],
"ldscript": "stm32f401rc.ld",
"mcu": "stm32f401rct6", "mcu": "stm32f401rct6",
"variant": "MARLIN_FYSETC_CHEETAH_V20" "variant": "MARLIN_FYSETC_CHEETAH_V20"
}, },
@ -56,7 +55,7 @@
"dfu", "dfu",
"jlink" "jlink"
], ],
"offset_address": "0x800C000", "offset_address": "0x8008000",
"require_upload_port": true, "require_upload_port": true,
"use_1200bps_touch": false, "use_1200bps_touch": false,
"wait_for_upload_port": false "wait_for_upload_port": false

2
buildroot/share/PlatformIO/variants/MARLIN_FYSETC_CHEETAH_V20/ldscript.ld
View File

@ -61,7 +61,7 @@ _Min_Stack_Size = 0x400;; /* required amount of stack */
/* Specify the memory areas */ /* Specify the memory areas */
MEMORY MEMORY
{ {
FLASH (rx) : ORIGIN = 0x800C000, LENGTH = 256K FLASH (rx) : ORIGIN = 0x8008000, LENGTH = 256K - 32K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
} }

2
ini/stm32f4.ini
View File

@ -48,7 +48,7 @@ build_flags = ${stm32_variant.build_flags}
platform = ${common_stm32.platform} platform = ${common_stm32.platform}
extends = stm32_variant extends = stm32_variant
board = marlin_FYSETC_CHEETAH_V20 board = marlin_FYSETC_CHEETAH_V20
board_build.offset = 0xC000 board_build.offset = 0x8000
build_flags = ${stm32_variant.build_flags} -DSTM32F401xC build_flags = ${stm32_variant.build_flags} -DSTM32F401xC
# #