![Scott Lahteine](/assets/img/avatar_default.png)
* Consolidate variant scripts * Rename Marlin-local boards * Simplify variants where possible * Rename variants * CHITU_F103 and MEEB_3DP: Maple platform `platformio-build-stm32f1.py` uses the 'board' name, not 'board_build.variant' so folder names match 'board' and not `board_build.variant`.
18 lines
736 B
C
18 lines
736 B
C
#pragma once
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#define digitalPinToPort(P) ( PIN_MAP[P].gpio_device )
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#define digitalPinToBitMask(P) ( BIT(PIN_MAP[P].gpio_bit) )
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#define portOutputRegister(port) ( &(port->regs->ODR) )
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#define portInputRegister(port) ( &(port->regs->IDR) )
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#define portSetRegister(pin) ( &(PIN_MAP[pin].gpio_device->regs->BSRR) )
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#define portClearRegister(pin) ( &(PIN_MAP[pin].gpio_device->regs->BRR) )
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#define portConfigRegister(pin) ( &(PIN_MAP[pin].gpio_device->regs->CRL) )
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static const uint8_t SS = BOARD_SPI1_NSS_PIN;
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static const uint8_t SS1 = BOARD_SPI2_NSS_PIN;
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static const uint8_t MOSI = BOARD_SPI1_MOSI_PIN;
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static const uint8_t MISO = BOARD_SPI1_MISO_PIN;
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static const uint8_t SCK = BOARD_SPI1_SCK_PIN;
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