ee016e605c
* Consolidate variant scripts * Rename Marlin-local boards * Simplify variants where possible * Rename variants * CHITU_F103 and MEEB_3DP: Maple platform `platformio-build-stm32f1.py` uses the 'board' name, not 'board_build.variant' so folder names match 'board' and not `board_build.variant`.
49 lines
3.0 KiB
Plaintext
49 lines
3.0 KiB
Plaintext
/*###ICF### Section handled by ICF editor, don't touch! ****/
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/*-Editor annotation file-*/
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/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
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/*-Vector table start*/
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define symbol __ICFEDIT_vector_start__ = 0x00080000; /*Add for CMSIS*/
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/*-Memory Regions-*/
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define symbol __ICFEDIT_region_RAM0_start__ = 0x20000000;
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define symbol __ICFEDIT_region_RAM0_end__ = 0x20007FFF;
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define symbol __ICFEDIT_region_RAM1_start__ = 0x20080000;
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define symbol __ICFEDIT_region_RAM1_end__ = 0x20083FFF;
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define symbol __ICFEDIT_region_ROM0_start__ = 0x00080000;
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define symbol __ICFEDIT_region_ROM0_end__ = 0x0009FFFF;
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define symbol __ICFEDIT_region_ROM1_start__ = 0x00100000;
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define symbol __ICFEDIT_region_ROM1_end__ = 0x0011FFFF;
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/*-Sizes-*/
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/*define symbol __ICFEDIT_size_cstack__ = 0x1000;*//*for nandflash*/
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define symbol __ICFEDIT_size_cstack__ = 0x2000;
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define symbol __ICFEDIT_size_heap__ = 0x200;
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/*-Specials-*/
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/*define symbol __ICFEDIT_region_RAM_VECT_start__ = __ICFEDIT_region_RAM0_start__;*/ /*Referenced for CMSIS*/
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/*define symbol __ICFEDIT_size_vectors__ = 0x100;*/ /*Referenced for CMSIS*/
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/*-Exports-*/
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/*export symbol __ICFEDIT_region_RAM_VECT_start__;*/
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export symbol __ICFEDIT_vector_start__; /*Add for CMSIS*/
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/**** End of ICF editor section. ###ICF###*/
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define memory mem with size = 4G;
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/*define region RAM_VECT_region = mem:[from __ICFEDIT_region_RAM_VECT_start__ size __ICFEDIT_size_vectors__];*/ /*Referenced for CMSIS*/
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/*define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__];*/ /*Referenced for CMSIS*/
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define region RAM0_region = mem:[from __ICFEDIT_region_RAM0_start__ to __ICFEDIT_region_RAM0_end__];
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define region RAM1_region = mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];
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/*define region RAM_region = mem:[from __ICFEDIT_region_RAM0_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM0_end__] |
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mem:[from __ICFEDIT_region_RAM1_start__ to __ICFEDIT_region_RAM1_end__];*/ /*Referenced for CMSIS*/
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define region ROM0_region = mem:[from __ICFEDIT_region_ROM0_start__ to __ICFEDIT_region_ROM0_end__];
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define region ROM1_region = mem:[from __ICFEDIT_region_ROM1_start__ to __ICFEDIT_region_ROM1_end__];
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/*define block RamVect with alignment = 8, size = __ICFEDIT_size_vectors__ { };*/
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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/*place at start of ROM0_region { readonly section .vectors };*/ /*Referenced for CMSIS*/
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place at address mem:__ICFEDIT_vector_start__ { readonly section .intvec }; /*Add for CMSIS*/
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place in ROM0_region { readonly };
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place in RAM0_region { readwrite, block HEAP };
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place in RAM1_region { block CSTACK }; /* for nandflash*/
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/*place in RAM_VECT_region { block RamVect };*/ /*Referenced for CMSIS*/ |