319 lines
11 KiB
C++
319 lines
11 KiB
C++
/**
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* Marlin 3D Printer Firmware
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*
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* Copyright (C) 2019 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com
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* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com
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* Copyright (c) 2017 Victor Perez
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/**
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* HAL for stm32duino.com based on Libmaple and compatible (STM32F1)
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*/
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#ifdef __STM32F1__
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// --------------------------------------------------------------------------
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// Includes
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// --------------------------------------------------------------------------
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#include "HAL.h"
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#include <STM32ADC.h>
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#include "../../inc/MarlinConfig.h"
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// --------------------------------------------------------------------------
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// Externals
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// --------------------------------------------------------------------------
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// --------------------------------------------------------------------------
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// Types
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// --------------------------------------------------------------------------
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#define __I
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#define __IO volatile
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typedef struct
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{
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__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */
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__IO uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */
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__IO uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */
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__IO uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */
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__IO uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */
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__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */
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__IO uint8_t SHP[12]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */
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__IO uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */
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__IO uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */
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__IO uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */
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__IO uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */
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__IO uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */
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__IO uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */
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__IO uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */
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__I uint32_t PFR[2]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */
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__I uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */
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__I uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */
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__I uint32_t MMFR[4]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */
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__I uint32_t ISAR[5]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */
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uint32_t RESERVED0[5];
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__IO uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */
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} SCB_Type;
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// --------------------------------------------------------------------------
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// Variables
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// --------------------------------------------------------------------------
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// --------------------------------------------------------------------------
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// Local defines
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// --------------------------------------------------------------------------
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#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */
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#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */
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#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */
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/* SCB Application Interrupt and Reset Control Register Definitions */
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#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */
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#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */
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#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */
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#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */
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// --------------------------------------------------------------------------
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// Public Variables
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// --------------------------------------------------------------------------
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#ifdef SERIAL_USB
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USBSerial SerialUSB;
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#endif
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uint16_t HAL_adc_result;
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// --------------------------------------------------------------------------
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// Private Variables
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// --------------------------------------------------------------------------
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STM32ADC adc(ADC1);
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uint8_t adc_pins[] = {
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#if HAS_TEMP_ADC_0
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TEMP_0_PIN,
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#endif
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#if HAS_HEATED_BED
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TEMP_BED_PIN,
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#endif
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#if HAS_HEATED_CHAMBER
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TEMP_CHAMBER_PIN,
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#endif
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#if HAS_TEMP_ADC_1
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TEMP_1_PIN,
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#endif
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#if HAS_TEMP_ADC_2
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TEMP_2_PIN,
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#endif
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#if HAS_TEMP_ADC_3
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TEMP_3_PIN,
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#endif
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#if HAS_TEMP_ADC_4
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TEMP_4_PIN,
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#endif
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#if HAS_TEMP_ADC_5
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TEMP_5_PIN,
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#endif
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#if ENABLED(FILAMENT_WIDTH_SENSOR)
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FILWIDTH_PIN,
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#endif
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};
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enum TEMP_PINS : char {
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#if HAS_TEMP_ADC_0
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TEMP_0,
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#endif
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#if HAS_HEATED_BED
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TEMP_BED,
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#endif
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#if HAS_HEATED_CHAMBER
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TEMP_CHAMBER,
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#endif
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#if HAS_TEMP_ADC_1
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TEMP_1,
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#endif
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#if HAS_TEMP_ADC_2
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TEMP_2,
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#endif
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#if HAS_TEMP_ADC_3
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TEMP_3,
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#endif
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#if HAS_TEMP_ADC_4
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TEMP_4,
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#endif
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#if HAS_TEMP_ADC_5
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TEMP_5,
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#endif
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#if ENABLED(FILAMENT_WIDTH_SENSOR)
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FILWIDTH,
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#endif
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ADC_PIN_COUNT
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};
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uint16_t HAL_adc_results[ADC_PIN_COUNT];
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// --------------------------------------------------------------------------
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// Function prototypes
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// --------------------------------------------------------------------------
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// --------------------------------------------------------------------------
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// Private functions
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// --------------------------------------------------------------------------
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static void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) {
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uint32_t reg_value;
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uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07); /* only values 0..7 are used */
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reg_value = SCB->AIRCR; /* read old register configuration */
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reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */
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reg_value = (reg_value |
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((uint32_t)0x5FA << SCB_AIRCR_VECTKEY_Pos) |
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(PriorityGroupTmp << 8)); /* Insert write key and priorty group */
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SCB->AIRCR = reg_value;
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}
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// --------------------------------------------------------------------------
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// Public functions
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// --------------------------------------------------------------------------
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//
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// Leave PA11/PA12 intact if USBSerial is not used
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//
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#if SERIAL_USB
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namespace wirish { namespace priv {
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#if SERIAL_PORT > 0
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#if SERIAL_PORT2
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#if SERIAL_PORT2 > 0
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void board_setup_usb(void) {}
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#endif
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#else
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void board_setup_usb(void) {}
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#endif
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#endif
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} }
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#endif
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void HAL_init(void) {
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NVIC_SetPriorityGrouping(0x3);
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}
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/* VGPV Done with defines
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// disable interrupts
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void cli(void) { noInterrupts(); }
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// enable interrupts
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void sei(void) { interrupts(); }
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*/
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void HAL_clear_reset_source(void) { }
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/**
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* TODO: Check this and change or remove.
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* currently returns 1 that's equal to poweron reset.
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*/
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uint8_t HAL_get_reset_source(void) { return 1; }
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void _delay_ms(const int delay_ms) { delay(delay_ms); }
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extern "C" {
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extern unsigned int _ebss; // end of bss section
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}
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/**
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* TODO: Change this to correct it for libmaple
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*/
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// return free memory between end of heap (or end bss) and whatever is current
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/*
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#include "wirish/syscalls.c"
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//extern caddr_t _sbrk(int incr);
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#ifndef CONFIG_HEAP_END
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extern char _lm_heap_end;
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#define CONFIG_HEAP_END ((caddr_t)&_lm_heap_end)
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#endif
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extern "C" {
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static int freeMemory() {
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char top = 't';
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return &top - reinterpret_cast<char*>(sbrk(0));
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}
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int freeMemory() {
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int free_memory;
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int heap_end = (int)_sbrk(0);
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free_memory = ((int)&free_memory) - ((int)heap_end);
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return free_memory;
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}
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}
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*/
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// --------------------------------------------------------------------------
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// ADC
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// --------------------------------------------------------------------------
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// Init the AD in continuous capture mode
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void HAL_adc_init(void) {
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// configure the ADC
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adc.calibrate();
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adc.setSampleRate(ADC_SMPR_41_5); // ?
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adc.setPins(adc_pins, ADC_PIN_COUNT);
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adc.setDMA(HAL_adc_results, (uint16_t)ADC_PIN_COUNT, (uint32_t)(DMA_MINC_MODE | DMA_CIRC_MODE), (void (*)())NULL);
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adc.setScanMode();
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adc.setContinuous();
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adc.startConversion();
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}
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void HAL_adc_start_conversion(const uint8_t adc_pin) {
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TEMP_PINS pin_index;
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switch (adc_pin) {
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#if HAS_TEMP_ADC_0
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case TEMP_0_PIN: pin_index = TEMP_0; break;
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#endif
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#if HAS_HEATED_BED
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case TEMP_BED_PIN: pin_index = TEMP_BED; break;
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#endif
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#if HAS_HEATED_CHAMBER
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case TEMP_CHAMBER_PIN: pin_index = TEMP_CHAMBER; break;
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#endif
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#if HAS_TEMP_ADC_1
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case TEMP_1_PIN: pin_index = TEMP_1; break;
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#endif
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#if HAS_TEMP_ADC_2
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case TEMP_2_PIN: pin_index = TEMP_2; break;
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#endif
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#if HAS_TEMP_ADC_3
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case TEMP_3_PIN: pin_index = TEMP_3; break;
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#endif
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#if HAS_TEMP_ADC_4
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case TEMP_4_PIN: pin_index = TEMP_4; break;
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#endif
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#if HAS_TEMP_ADC_5
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case TEMP_5_PIN: pin_index = TEMP_5; break;
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#endif
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#if ENABLED(FILAMENT_WIDTH_SENSOR)
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case FILWIDTH_PIN: pin_index = FILWIDTH; break;
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#endif
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}
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HAL_adc_result = (HAL_adc_results[(int)pin_index] >> 2) & 0x3FF; // shift to get 10 bits only.
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}
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uint16_t HAL_adc_get_result(void) {
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return HAL_adc_result;
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}
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#endif // __STM32F1__
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