307 lines
10 KiB
C
307 lines
10 KiB
C
/**
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******************************************************************************
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* @file stm32f1xx_hal_nor.h
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* @author MCD Application Team
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* @version V1.1.1
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* @date 12-May-2017
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* @brief Header file of NOR HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F1xx_HAL_NOR_H
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#define __STM32F1xx_HAL_NOR_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f1xx_ll_fsmc.h"
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/** @addtogroup STM32F1xx_HAL_Driver
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* @{
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*/
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#if defined (STM32F101xE) || defined(STM32F103xE) || defined(STM32F101xG) || defined(STM32F103xG) || defined(STM32F100xE)
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/** @addtogroup NOR
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* @{
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*/
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/** @addtogroup NOR_Private_Constants
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* @{
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*/
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/* NOR device IDs addresses */
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#define MC_ADDRESS ((uint16_t)0x0000)
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#define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
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#define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
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#define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
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/* NOR CFI IDs addresses */
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#define CFI1_ADDRESS ((uint16_t)0x10)
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#define CFI2_ADDRESS ((uint16_t)0x11)
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#define CFI3_ADDRESS ((uint16_t)0x12)
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#define CFI4_ADDRESS ((uint16_t)0x13)
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/* NOR operation wait timeout */
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#define NOR_TMEOUT ((uint16_t)0xFFFF)
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/* NOR memory data width */
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#define NOR_MEMORY_8B ((uint8_t)0x0)
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#define NOR_MEMORY_16B ((uint8_t)0x1)
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/* NOR memory device read/write start address */
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#define NOR_MEMORY_ADRESS1 FSMC_BANK1_1
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#define NOR_MEMORY_ADRESS2 FSMC_BANK1_2
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#define NOR_MEMORY_ADRESS3 FSMC_BANK1_3
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#define NOR_MEMORY_ADRESS4 FSMC_BANK1_4
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/**
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* @}
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*/
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/** @addtogroup NOR_Private_Macros
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* @{
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*/
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/**
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* @brief NOR memory address shifting.
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* @param __NOR_ADDRESS: NOR base address
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* @param __NOR_MEMORY_WIDTH_: NOR memory width
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* @param __ADDRESS__: NOR memory address
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* @retval NOR shifted address value
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*/
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#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
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((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
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((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \
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((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
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/**
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* @brief NOR memory write data to specified address.
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* @param __ADDRESS__: NOR memory address
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* @param __DATA__: Data to write
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* @retval None
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*/
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#define NOR_WRITE(__ADDRESS__, __DATA__) (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__))
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/**
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* @}
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*/
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/* Exported typedef ----------------------------------------------------------*/
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/** @defgroup NOR_Exported_Types NOR Exported Types
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* @{
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*/
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/**
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* @brief HAL SRAM State structures definition
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*/
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typedef enum
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{
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HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */
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HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */
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HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */
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HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */
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HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */
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}HAL_NOR_StateTypeDef;
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/**
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* @brief FSMC NOR Status typedef
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*/
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typedef enum
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{
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HAL_NOR_STATUS_SUCCESS = 0U,
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HAL_NOR_STATUS_ONGOING,
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HAL_NOR_STATUS_ERROR,
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HAL_NOR_STATUS_TIMEOUT
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}HAL_NOR_StatusTypeDef;
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/**
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* @brief FSMC NOR ID typedef
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*/
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typedef struct
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{
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uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
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uint16_t Device_Code1;
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uint16_t Device_Code2;
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uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
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These codes can be accessed by performing read operations with specific
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control signals and addresses set.They can also be accessed by issuing
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an Auto Select command */
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}NOR_IDTypeDef;
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/**
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* @brief FSMC NOR CFI typedef
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*/
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typedef struct
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{
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/*!< Defines the information stored in the memory's Common flash interface
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which contains a description of various electrical and timing parameters,
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density information and functions supported by the memory */
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uint16_t CFI_1;
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uint16_t CFI_2;
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uint16_t CFI_3;
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uint16_t CFI_4;
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}NOR_CFITypeDef;
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/**
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* @brief NOR handle Structure definition
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*/
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typedef struct
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{
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FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
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FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
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FSMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
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HAL_LockTypeDef Lock; /*!< NOR locking object */
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__IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
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}NOR_HandleTypeDef;
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup NOR_Exported_macro NOR Exported Macros
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* @{
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*/
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/** @brief Reset NOR handle state
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* @param __HANDLE__: NOR handle
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* @retval None
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*/
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#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup NOR_Exported_Functions NOR Exported Functions
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* @{
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*/
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/** @addtogroup NOR_Exported_Functions_Group1
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* @{
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*/
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/* Initialization/de-initialization functions **********************************/
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HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming);
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HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
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void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
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void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
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void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
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/**
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* @}
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*/
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/** @addtogroup NOR_Exported_Functions_Group2
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* @{
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*/
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/* I/O operation functions ***************************************************/
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HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
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HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
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HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
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HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
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HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
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HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
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HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
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HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
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HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
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/**
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* @}
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*/
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/** @addtogroup NOR_Exported_Functions_Group3
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* @{
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*/
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/* NOR Control functions *****************************************************/
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HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
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HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
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/**
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* @}
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*/
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/** @addtogroup NOR_Exported_Functions_Group4
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* @{
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*/
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/* NOR State functions ********************************************************/
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HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
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HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* STM32F101xE || STM32F103xE || STM32F101xG || STM32F103xG || STM32F100xE */
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32F1xx_HAL_NOR_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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