MPCNC/Firmware2
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2 Commits

Author SHA1 Message Date
Bob Kuhn
456a0ee76b Improve Due SW SPI, Fysetc sanity checks, &c. (#13939) 2019-05-11 16:51:39 -05:00
Bob Kuhn
c48e6be366 Fysetc panel, RUMBA and ReARM pins, SPI mode 3 (#13900) 2019-05-04 17:59:36 -05:00